[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v2 07/17] x86/xstate: replace xsave_cntxt_size and drop XCNTXT_MASK
XCNTXT_MASK is effectively embedded in recalculate_xstate(), and xsave_cntxt_size was redundant with the host CPUID policy's xstate.max_size field. Use the host CPUID policy as input (requiring it to be calculated earlier), thus allowing e.g. "cpuid=no-avx512f" to also result in avoiding allocation of space for ZMM and mask register state. Also drop a stale part of an adjacent comment. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> --- v2: New. --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -20,9 +20,10 @@ /* * Maximum size (in byte) of the XSAVE/XRSTOR save area required by all * the supported and enabled features on the processor, including the - * XSAVE.HEADER. We only enable XCNTXT_MASK that we have known. + * XSAVE.HEADER. We only enable cpuid_policy_xcr0_max(&host_cpuid_policy). + * Note that this identifier should not be usable as an lvalue. */ -static u32 __read_mostly xsave_cntxt_size; +#define xsave_cntxt_size (host_cpuid_policy.xstate.max_size | 0) /* A 64-bit bitmask of the XSAVE/XRSTOR features supported by processor. */ u64 __read_mostly xfeature_mask; @@ -577,8 +578,23 @@ static unsigned int _xstate_ctxt_size(u6 ASSERT(ok); cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); ASSERT(ebx <= ecx); - ok = set_xcr0(act_xcr0); - ASSERT(ok); + + /* + * When called the very first time from xstate_init(), act_xcr0 (as read + * from per-CPU data) is still zero. xstate_init() wants this function to + * leave xfeature_mask in place, so avoid restoration in this case (which + * would fail anyway). + */ + if ( act_xcr0 ) + { + ok = set_xcr0(act_xcr0); + ASSERT(ok); + } + else + { + BUG_ON(!ok); + ASSERT(xcr0 == xfeature_mask); + } return ebx; } @@ -650,42 +666,35 @@ void xstate_init(struct cpuinfo_x86 *c) return; if ( (bsp && !use_xsave) || - boot_cpu_data.cpuid_level < XSTATE_CPUID ) + c->cpuid_level < XSTATE_CPUID ) { BUG_ON(!bsp); setup_clear_cpu_cap(X86_FEATURE_XSAVE); return; } - cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); - feature_mask = (((u64)edx << 32) | eax) & XCNTXT_MASK; - BUG_ON(!valid_xcr0(feature_mask)); - BUG_ON(!(feature_mask & X86_XCR0_SSE)); - - /* - * Set CR4_OSXSAVE and run "cpuid" to get xsave_cntxt_size. - */ - set_in_cr4(X86_CR4_OSXSAVE); - if ( !set_xcr0(feature_mask) ) - BUG(); - if ( bsp ) { + feature_mask = cpuid_policy_xcr0_max(&host_cpuid_policy); + BUG_ON(!valid_xcr0(feature_mask)); + BUG_ON(!(feature_mask & X86_XCR0_SSE)); + xfeature_mask = feature_mask; - /* - * xsave_cntxt_size is the max size required by enabled features. - * We know FP/SSE and YMM about eax, and nothing about edx at present. - */ - xsave_cntxt_size = _xstate_ctxt_size(feature_mask); + /* xsave_cntxt_size is the max size required by enabled features. */ printk("xstate: size: %#x and states: %#"PRIx64"\n", - xsave_cntxt_size, xfeature_mask); - } - else - { - BUG_ON(xfeature_mask != feature_mask); - BUG_ON(xsave_cntxt_size != _xstate_ctxt_size(feature_mask)); + xsave_cntxt_size, feature_mask); + + set_in_cr4(X86_CR4_OSXSAVE); } + cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); + feature_mask = (((uint64_t)edx << 32) | eax) & xfeature_mask; + BUG_ON(xfeature_mask != feature_mask); + + /* This has the side effect of set_xcr0(feature_mask). */ + if ( xsave_cntxt_size != _xstate_ctxt_size(feature_mask) ) + BUG(); + if ( setup_xstate_features(bsp) && bsp ) BUG(); } --- a/xen/include/asm-x86/xstate.h +++ b/xen/include/asm-x86/xstate.h @@ -30,9 +30,6 @@ extern uint32_t mxcsr_mask; #define XSTATE_AREA_MIN_SIZE (FXSAVE_SIZE + XSAVE_HDR_SIZE) #define XSTATE_FP_SSE (X86_XCR0_FP | X86_XCR0_SSE) -#define XCNTXT_MASK (X86_XCR0_FP | X86_XCR0_SSE | X86_XCR0_YMM | \ - X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM | \ - XSTATE_NONLAZY) #define XSTATE_ALL (~(1ULL << 63)) #define XSTATE_NONLAZY (X86_XCR0_BNDREGS | X86_XCR0_BNDCSR | X86_XCR0_PKRU)
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