[patch 18/30] PCI: xilinx-nwl: Use irq_data_get_irq_chip_data()

[Thomas Gleixner <tglx@xxxxxxxxxxxxx>]

Going through a full irq descriptor lookup instead of just using the proper
helper function which provides direct access is suboptimal.

In fact it _is_ wrong because the chip callback needs to get the chip data
which is relevant for the chip while using the irq descriptor variant
returns the irq chip data of the top level chip of a hierarchy. It does not
matter in this case because the chip is the top level chip, but that
doesn't make it more correct.

Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
Cc: Rob Herring <robh@xxxxxxxxxx>
Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
Cc: Michal Simek <michal.simek@xxxxxxxxxx>
Cc: linux-pci@xxxxxxxxxxxxxxx
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
---
 drivers/pci/controller/pcie-xilinx-nwl.c |    8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

--- a/drivers/pci/controller/pcie-xilinx-nwl.c
+++ b/drivers/pci/controller/pcie-xilinx-nwl.c
@@ -379,13 +379,11 @@ static void nwl_pcie_msi_handler_low(str
 
 static void nwl_mask_leg_irq(struct irq_data *data)
 {
-       struct irq_desc *desc = irq_to_desc(data->irq);
-       struct nwl_pcie *pcie;
+       struct nwl_pcie *pcie = irq_data_get_irq_chip_data(data);
        unsigned long flags;
        u32 mask;
        u32 val;
 
-       pcie = irq_desc_get_chip_data(desc);
        mask = 1 << (data->hwirq - 1);
        raw_spin_lock_irqsave(&pcie->leg_mask_lock, flags);
        val = nwl_bridge_readl(pcie, MSGF_LEG_MASK);
@@ -395,13 +393,11 @@ static void nwl_mask_leg_irq(struct irq_
 
 static void nwl_unmask_leg_irq(struct irq_data *data)
 {
-       struct irq_desc *desc = irq_to_desc(data->irq);
-       struct nwl_pcie *pcie;
+       struct nwl_pcie *pcie = irq_data_get_irq_chip_data(data);
        unsigned long flags;
        u32 mask;
        u32 val;
 
-       pcie = irq_desc_get_chip_data(desc);
        mask = 1 << (data->hwirq - 1);
        raw_spin_lock_irqsave(&pcie->leg_mask_lock, flags);
        val = nwl_bridge_readl(pcie, MSGF_LEG_MASK);