[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v4 1/8] xen/arm: Use READ_SYSREG instead of 32/64 versions
On Thu, 17 Dec 2020, Bertrand Marquis wrote: > Modify identify_cpu function to use READ_SYSREG instead of READ_SYSREG32 > or READ_SYSREG64. > The aarch32 versions of the registers are 64bit on an aarch64 processor > so it was wrong to access them as 32bit registers. This sentence is a bit confusing because, as an example, MIDR_EL1 is also an aarch64 register, not only an aarch32 register. Maybe we should clarify. Aside from that: Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> > Signed-off-by: Bertrand Marquis <bertrand.marquis@xxxxxxx> > > --- > Change in V4: > This patch was introduced in v4. > > --- > xen/arch/arm/cpufeature.c | 50 +++++++++++++++++++-------------------- > 1 file changed, 25 insertions(+), 25 deletions(-) > > diff --git a/xen/arch/arm/cpufeature.c b/xen/arch/arm/cpufeature.c > index 44126dbf07..115e1b164d 100644 > --- a/xen/arch/arm/cpufeature.c > +++ b/xen/arch/arm/cpufeature.c > @@ -99,44 +99,44 @@ int enable_nonboot_cpu_caps(const struct > arm_cpu_capabilities *caps) > > void identify_cpu(struct cpuinfo_arm *c) > { > - c->midr.bits = READ_SYSREG32(MIDR_EL1); > + c->midr.bits = READ_SYSREG(MIDR_EL1); > c->mpidr.bits = READ_SYSREG(MPIDR_EL1); > > #ifdef CONFIG_ARM_64 > - c->pfr64.bits[0] = READ_SYSREG64(ID_AA64PFR0_EL1); > - c->pfr64.bits[1] = READ_SYSREG64(ID_AA64PFR1_EL1); > + c->pfr64.bits[0] = READ_SYSREG(ID_AA64PFR0_EL1); > + c->pfr64.bits[1] = READ_SYSREG(ID_AA64PFR1_EL1); > > - c->dbg64.bits[0] = READ_SYSREG64(ID_AA64DFR0_EL1); > - c->dbg64.bits[1] = READ_SYSREG64(ID_AA64DFR1_EL1); > + c->dbg64.bits[0] = READ_SYSREG(ID_AA64DFR0_EL1); > + c->dbg64.bits[1] = READ_SYSREG(ID_AA64DFR1_EL1); > > - c->aux64.bits[0] = READ_SYSREG64(ID_AA64AFR0_EL1); > - c->aux64.bits[1] = READ_SYSREG64(ID_AA64AFR1_EL1); > + c->aux64.bits[0] = READ_SYSREG(ID_AA64AFR0_EL1); > + c->aux64.bits[1] = READ_SYSREG(ID_AA64AFR1_EL1); > > - c->mm64.bits[0] = READ_SYSREG64(ID_AA64MMFR0_EL1); > - c->mm64.bits[1] = READ_SYSREG64(ID_AA64MMFR1_EL1); > + c->mm64.bits[0] = READ_SYSREG(ID_AA64MMFR0_EL1); > + c->mm64.bits[1] = READ_SYSREG(ID_AA64MMFR1_EL1); > > - c->isa64.bits[0] = READ_SYSREG64(ID_AA64ISAR0_EL1); > - c->isa64.bits[1] = READ_SYSREG64(ID_AA64ISAR1_EL1); > + c->isa64.bits[0] = READ_SYSREG(ID_AA64ISAR0_EL1); > + c->isa64.bits[1] = READ_SYSREG(ID_AA64ISAR1_EL1); > #endif > > - c->pfr32.bits[0] = READ_SYSREG32(ID_PFR0_EL1); > - c->pfr32.bits[1] = READ_SYSREG32(ID_PFR1_EL1); > + c->pfr32.bits[0] = READ_SYSREG(ID_PFR0_EL1); > + c->pfr32.bits[1] = READ_SYSREG(ID_PFR1_EL1); > > - c->dbg32.bits[0] = READ_SYSREG32(ID_DFR0_EL1); > + c->dbg32.bits[0] = READ_SYSREG(ID_DFR0_EL1); > > - c->aux32.bits[0] = READ_SYSREG32(ID_AFR0_EL1); > + c->aux32.bits[0] = READ_SYSREG(ID_AFR0_EL1); > > - c->mm32.bits[0] = READ_SYSREG32(ID_MMFR0_EL1); > - c->mm32.bits[1] = READ_SYSREG32(ID_MMFR1_EL1); > - c->mm32.bits[2] = READ_SYSREG32(ID_MMFR2_EL1); > - c->mm32.bits[3] = READ_SYSREG32(ID_MMFR3_EL1); > + c->mm32.bits[0] = READ_SYSREG(ID_MMFR0_EL1); > + c->mm32.bits[1] = READ_SYSREG(ID_MMFR1_EL1); > + c->mm32.bits[2] = READ_SYSREG(ID_MMFR2_EL1); > + c->mm32.bits[3] = READ_SYSREG(ID_MMFR3_EL1); > > - c->isa32.bits[0] = READ_SYSREG32(ID_ISAR0_EL1); > - c->isa32.bits[1] = READ_SYSREG32(ID_ISAR1_EL1); > - c->isa32.bits[2] = READ_SYSREG32(ID_ISAR2_EL1); > - c->isa32.bits[3] = READ_SYSREG32(ID_ISAR3_EL1); > - c->isa32.bits[4] = READ_SYSREG32(ID_ISAR4_EL1); > - c->isa32.bits[5] = READ_SYSREG32(ID_ISAR5_EL1); > + c->isa32.bits[0] = READ_SYSREG(ID_ISAR0_EL1); > + c->isa32.bits[1] = READ_SYSREG(ID_ISAR1_EL1); > + c->isa32.bits[2] = READ_SYSREG(ID_ISAR2_EL1); > + c->isa32.bits[3] = READ_SYSREG(ID_ISAR3_EL1); > + c->isa32.bits[4] = READ_SYSREG(ID_ISAR4_EL1); > + c->isa32.bits[5] = READ_SYSREG(ID_ISAR5_EL1); > } > > /* > -- > 2.17.1 >
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