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Re: Smoke test failure on Arm (was Re: [PATCH v4 0/8] xen/arm: Emulate ID registers) [and 2 more messages]

It seems there is still something wrong with ARM in staging.  Whatever
change was made passed the smoke test but now the main flights are

osstest service owner writes:
> flight 158303 xen-unstable real [real]
> http://logs.test-lab.xenproject.org/osstest/logs/158303/
> Regressions :-(
> Tests which did not succeed and are blocking,
> including tests which could not be run:
>  test-arm64-arm64-xl-thunderx  8 xen-boot             fail REGR. vs. 158290
>  test-arm64-arm64-examine      8 reboot               fail REGR. vs. 158290
>  test-arm64-arm64-xl-xsm       8 xen-boot             fail REGR. vs. 158290
>  test-arm64-arm64-xl-credit1   8 xen-boot             fail REGR. vs. 158290

The bisector has fingered the same commit in unstable as it did in the
smoke tests.  That might be because the fix made to staging, to get
the smoke tests to pass, was not complete enough.  It also might be
because something different broke the other tests and the tree was
briefly working in between.

fx: puts on Release Manager hat.  Can one of you ARM folks please take
a look at this and fix it ASAP ?


osstest service owner writes ("[xen-unstable bisection] complete 
> branch xen-unstable
> xenbranch xen-unstable
> job test-arm64-arm64-xl-xsm
> testid xen-boot
> Tree: linux git://xenbits.xen.org/linux-pvops.git
> Tree: linuxfirmware git://xenbits.xen.org/osstest/linux-firmware.git
> Tree: qemuu git://xenbits.xen.org/qemu-xen.git
> Tree: xen git://xenbits.xen.org/xen.git
> *** Found and reproduced problem changeset ***
>   Bug is in tree:  xen git://xenbits.xen.org/xen.git
>   Bug introduced:  9cfdb489af810f71acb7dcdb87075dc7b3b313a0
>   Bug not present: a9f1f03b2710f5ce84f69c1c4516349531053fac
>   Last fail repro: http://logs.test-lab.xenproject.org/osstest/logs/158347/
>   commit 9cfdb489af810f71acb7dcdb87075dc7b3b313a0
>   Author: Bertrand Marquis <bertrand.marquis@xxxxxxx>
>   Date:   Thu Dec 17 15:38:02 2020 +0000
>       xen/arm: Add ID registers and complete cpuinfo
>       Add definition and entries in cpuinfo for ID registers introduced in
>       newer Arm Architecture reference manual:
>       - ID_PFR2: processor feature register 2
>       - ID_DFR1: debug feature register 1
>       - ID_MMFR4 and ID_MMFR5: Memory model feature registers 4 and 5
>       - ID_ISA6: ISA Feature register 6
>       Add more bitfield definitions in PFR fields of cpuinfo.
>       Add MVFR2 register definition for aarch32.
>       Add MVFRx_EL1 defines for aarch32.
>       Add mvfr values in cpuinfo.
>       Add some registers definition for arm64 in sysregs as some are not
>       always know by compilers.
>       Initialize the new values added in cpuinfo in identify_cpu during init.
>       Signed-off-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>
>       Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>



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