[PATCH v2 2/2] x86/AMD: drop MSR_K7_HWCR

[Jan Beulich <jbeulich@xxxxxxxx>]

We don't support any K7 (32-bit only) hardware anymore, and the MSR is
accessible as MSR_K8_HWCR as well. Using the K7 name was particularly
odd for Hygon as well as in a Fam0F-specific piece of code.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
v2: New.
---
Of course there are more MSR_K7_* left - we'll have to convert them over
time.

--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -694,9 +694,9 @@ static void init_amd(struct cpuinfo_x86
         * Errata 122 for all steppings (F+ have it disabled by default)
         */
        if (c->x86 == 15) {
-               rdmsrl(MSR_K7_HWCR, value);
+               rdmsrl(MSR_K8_HWCR, value);
                value |= 1 << 6;
-               wrmsrl(MSR_K7_HWCR, value);
+               wrmsrl(MSR_K8_HWCR, value);
        }
 
        /*
@@ -928,9 +928,9 @@ static void init_amd(struct cpuinfo_x86
        }
 
        if (cpu_has(c, X86_FEATURE_EFRO)) {
-               rdmsr(MSR_K7_HWCR, l, h);
+               rdmsr(MSR_K8_HWCR, l, h);
                l |= (1 << 27); /* Enable read-only APERF/MPERF bit */
-               wrmsr(MSR_K7_HWCR, l, h);
+               wrmsr(MSR_K8_HWCR, l, h);
        }
 
        /* Prevent TSC drift in non single-processor, single-core platforms. */
--- a/xen/arch/x86/cpu/hygon.c
+++ b/xen/arch/x86/cpu/hygon.c
@@ -70,9 +70,9 @@ static void init_hygon(struct cpuinfo_x8
                __set_bit(X86_FEATURE_ARAT, c->x86_capability);
 
        if (cpu_has(c, X86_FEATURE_EFRO)) {
-               rdmsrl(MSR_K7_HWCR, value);
+               rdmsrl(MSR_K8_HWCR, value);
                value |= (1 << 27); /* Enable read-only APERF/MPERF bit */
-               wrmsrl(MSR_K7_HWCR, value);
+               wrmsrl(MSR_K8_HWCR, value);
        }
 
        amd_log_freq(c);
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -295,7 +295,6 @@
 #define MSR_K7_CLK_CTL                 0xc001001b
 #define MSR_K8_TOP_MEM2                        0xc001001d
 
-#define MSR_K7_HWCR                    0xc0010015
 #define MSR_K8_HWCR                    0xc0010015
 #define K8_HWCR_MON_MWAIT_USER_EN      (1ULL << 10)
 #define K8_HWCR_MCi_STATUS_WREN                (1ULL << 18)