Re: [RFC PATCH V3 04/11] HV: Add Write/Read MSR registers via ghcb

[Tianyu Lan <ltykernel@xxxxxxxxx>]

On 6/9/2021 8:46 PM, Joerg Roedel wrote:
> On Sun, May 30, 2021 at 11:06:21AM -0400, Tianyu Lan wrote:
> > +void hv_ghcb_msr_write(u64 msr, u64 value)
> > +{
> > +       union hv_ghcb *hv_ghcb;
> > +       void **ghcb_base;
> > +       unsigned long flags;
> > +
> > +       if (!ms_hyperv.ghcb_base)
> > +               return;
> > +
> > +       local_irq_save(flags);
> > +       ghcb_base = (void **)this_cpu_ptr(ms_hyperv.ghcb_base);
> > +       hv_ghcb = (union hv_ghcb *)*ghcb_base;
> > +       if (!hv_ghcb) {
> > +               local_irq_restore(flags);
> > +               return;
> > +       }
> > +
> > +       memset(hv_ghcb, 0x00, HV_HYP_PAGE_SIZE);
> > +
> > +       hv_ghcb->ghcb.protocol_version = 1;
> > +       hv_ghcb->ghcb.ghcb_usage = 0;
> > +
> > +       ghcb_set_sw_exit_code(&hv_ghcb->ghcb, SVM_EXIT_MSR);
> > +       ghcb_set_rcx(&hv_ghcb->ghcb, msr);
> > +       ghcb_set_rax(&hv_ghcb->ghcb, lower_32_bits(value));
> > +       ghcb_set_rdx(&hv_ghcb->ghcb, value >> 32);
> > +       ghcb_set_sw_exit_info_1(&hv_ghcb->ghcb, 1);
> > +       ghcb_set_sw_exit_info_2(&hv_ghcb->ghcb, 0);
> > +
> > +       VMGEXIT();
> This is not safe to use from NMI context. You need at least some
> checking or WARN_ON/assertion/whatever to catch cases where this is
> violated. Otherwise it will result in some hard to debug bug reports.
Nice catch. Will update in the next version.

Thanks.