Re: [PATCH] x86/xstate: reset cached register values on resume

[Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx>]

On Wed, Aug 18, 2021 at 01:44:31PM +0100, Andrew Cooper wrote:
> On 18/08/2021 12:30, Marek Marczykowski-Górecki wrote:
> > set_xcr0() and set_msr_xss() use cached value to avoid setting the
> > register to the same value over and over. But suspend/resume implicitly
> > reset the registers and since percpu areas are not deallocated on
> > suspend anymore, the cache gets stale.
> > Reset the cache on resume, to ensure the next write will really hit the
> > hardware. Choose value 0, as it will never be a legitimate write to
> > those registers - and so, will force write (and cache update).
> >
> > Note the cache is used io get_xcr0() and get_msr_xss() too, but:
> > - set_xcr0() is called few lines below in xstate_init(), so it will
> >   update the cache with appropriate value
> > - get_msr_xss() is not used anywhere - and thus not before any
> >   set_msr_xss() that will fill the cache
> >
> > Fixes: aca2a985a55a "xen: don't free percpu areas during suspend"
> > Signed-off-by: Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx>
> 
> I'd prefer to do this differently.  As I said in the thread, there are
> other registers such as MSR_TSC_AUX which fall into the same category,
> and I'd like to make something which works systematically.

I'm not sure if I understand your message: do you want me to do things
differently, or are you working on an alternative fix yourself?

-- 
Best Regards,
Marek Marczykowski-Górecki
Invisible Things Lab

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