[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v7 3/8] AMD/IOMMU: improve (extended) feature detection

  • To: Jan Beulich <jbeulich@xxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Date: Thu, 26 Aug 2021 14:02:19 +0100
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=WbWWBMHUiLKqgk5UeGGu4iTc0TkCXDO2CWyE5KpIl6I=; b=FlDt259W9fST5lWmpOcvsPkUXwGdoosf1LP1W5FacRu2DwpJDw58qaqcDRwVKyXJ5ajVrH2PXREgbZ76CdOCYnXVQ1E7RjG7aDc+cVPC1Ci17gxMLMLaxHInFaF66Pz8ixrdBmQ9Yz52RA8Q7Pz2vyA+WZTa0pifvAKz5VORMmp3POZ/KDDM/oZji8aRd7Z6lvRv3hCyk+4lCZhv9jBRGSj/9l1jOU2TlE//dyNDPqjtbmgucujz3yW9doD770CDCB+k4ej7/TxGeroQ48a0S3v5UhXhj9OErfA+0Ip3QBiOYHu1St3YE6GKvCkvJA9gkbcai4LghPFEZftT4yx42Q==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=dkThKU9xr5lsK3Ka41nkEafeNqHJ/oWJ6kQiGqC3LUxfpH3nlhW2ytkqdLkYi1BpdxgNs+TXN+8VMlyAlJND40Llk7xMeGB8NIcZkeoO7n4+cfKf3v9DSUFmOFjnWoC+rhUVy4zeP41QtAxW01tsUaKOmHIjL4580+c2n7Pok7dCqOfSj2h8s3cClyqxmy8IFDEifs/8SYY2x/QPexsKtTkXlbh/lRwq9hi7FtRe02UuT2iU1kV9g90qur1JYbbAwuLA0PgOVvsK1+ZLW9UaGJj1yQ9Vp2MJIIAi8PF8v8w34fGmPJOo7SuEEsAY6eEnr0Jhde+Y+SIkYdw+wgJlkQ==
  • Authentication-results: esa3.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
  • Cc: Paul Durrant <paul@xxxxxxx>
  • Delivery-date: Thu, 26 Aug 2021 13:02:38 +0000
  • Ironport-hdrordr: A9a23:KzDjr653FQPqLlLAowPXwDLXdLJyesId70hD6qkQc3FomwKj9/ xG/c5rsSMc7Qx6ZJhOo7+90cW7L080lqQFhLX5X43SPzUO0VHARO1fBOPZqAEIcBeOlNK1u5 0AT0B/YueAcGSTj6zBkXWF+wBL+qj5zEiq792usUuEVWtRGsZdB58SMHfhLqVxLjM2Y6YRJd 6nyedsgSGvQngTZtTTPAh+YwCSz+e77a4PeHQ9dmYa1DU=
  • Ironport-sdr: umnlxIWvqNOcTr5C+4K5naNLG35wlsLghbVkB0rekGV3PGtfhWA2hP06+El1o+XSBcGG2UzScZ FVnwWr5hsLddsTob4KrhLAN/JsHnLYtETbAkmO8h1sF9i44ijxrgEz7RtSAn7zzcI/mi5XlzJ3 f6wMu3gHz1LFtP+0r6mv47Yr+6jhMsBAIACNkXjT7sMhX9PV8FAWK3jlmOTm60kfDRi0hXMypj MJ0HBhJjY352zoLmKRXmcDZMFFik4uO+BOFnyg3I8JPcSS9T/qQBZl1lrjfUBCOvcdWbnGpRFA L1y6ObgNqJBdnNAXdaSZ22V0
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 26/08/2021 08:23, Jan Beulich wrote:
> First of all the documentation is very clear about ACPI table data
> superseding raw register data. Use raw register data only if EFRSup is
> clear in the ACPI tables (which may still go too far). Additionally if
> this flag is clear, the IVRS type 11H table is reserved and hence may
> not be recognized.

The spec says:

Software Implementation Note: Information conveyed in the IVRS overrides
the corresponding
information available through the IOMMU hardware registers. System
software is required to honor
the ACPI settings.

This suggests that if there is an ACPI table, the hardware registers
shouldn't be followed.

Given what else is broken when there is no APCI table, I think we can
(and should) not support this configuration.

> Furthermore propagate IVRS type 10H data into the feature flags
> recorded, as the full extended features field is available in type 11H
> only.
> Note that this also makes necessary to stop the bad practice of us
> finding a type 11H IVHD entry, but still processing the type 10H one
> in detect_iommu_acpi()'s invocation of amd_iommu_detect_one_acpi().

I could have sworn I read in the spec that if 11H is present, 10H should
be ignored, but I can't actually locate a statement to this effect.


> Note also that the features.raw check in amd_iommu_prepare_one() needs
> replacing, now that the field can also be populated by different means.
> Key IOMMUv2 availability off of IVHD type not being 10H, and then move
> it a function layer up, so that it would be set only once all IOMMUs
> have been successfully prepared.
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> Reviewed-by: Paul Durrant <paul@xxxxxxx>



Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.