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Re: [PATCH v1 1/2] x86/cpuid: Expose NullSelectorClearsBase CPUID bit to guests


  • To: Jane Malalane <jane.malalane@xxxxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Date: Mon, 6 Sep 2021 20:20:34 +0100
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On 06/09/2021 13:00, Jane Malalane wrote:
> diff --git a/xen/include/public/arch-x86/cpufeatureset.h 
> b/xen/include/public/arch-x86/cpufeatureset.h
> index 380b51b1b3..e5a7c94c78 100644
> --- a/xen/include/public/arch-x86/cpufeatureset.h
> +++ b/xen/include/public/arch-x86/cpufeatureset.h
> @@ -285,6 +285,7 @@ XEN_CPUFEATURE(FSRCS,        10*32+12) /*A  Fast Short 
> REP CMPSB/SCASB */
>  
>  /* AMD-defined CPU features, CPUID level 0x80000021.eax, word 11 */
>  XEN_CPUFEATURE(LFENCE_DISPATCH,    11*32+ 2) /*A  LFENCE always serializing 
> */
> +XEN_CPUFEATURE(NSCB,               11*32+ 6) /*A  Null Selector Clears Base 
> */

On second thoughts, I'm tempted to add " (and limit too)" to the comment.

Can be fixed on commit.

~Andrew



 


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