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[PATCH] pci: fix handling of PCI bridges with subordinate bus number 0xff


  • To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Igor Druzhinin <igor.druzhinin@xxxxxxxxxx>
  • Date: Fri, 24 Sep 2021 02:06:59 +0100
  • Authentication-results: esa1.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none
  • Cc: <jbeulich@xxxxxxxx>, <paul@xxxxxxx>, Igor Druzhinin <igor.druzhinin@xxxxxxxxxx>
  • Delivery-date: Fri, 24 Sep 2021 01:07:47 +0000
  • Ironport-data: A9a23:yCvSk61yved+6545ovbD5dFxkn2cJEfYwER7XKvMYLTBsI5bp2AHz WVOWD+PMqyPNzahctxxaoy/8kNX6pTTxtYxSQc4pC1hF35El5HIVI+TRqvS04J+DSFhoGZPt Zh2hgzodZhsJpPkS5PE3oHJ9RGQ74nRLlbHILOCan0ZqTNMEn970EoywbVh2eaEvPDia++zk YKqyyHgEAfNNw5cagr4PIra9XuDFNyr0N8plgRWicJj5TcypFFMZH4rHomjLmOQf2VhNrXSq 9Avbl2O1jixEx8FUrtJm1tgG6EAaua60QOm0hK6V0U+6/TrS+NbPqsTbZIhhUlrZzqhutNy1 Y5ptpmMQBZxZpHXncRFWUlXOnQrVUFG0OevzXmXtMWSywvNcmf2wuUoB0YzVWEa0r8pWycUr 6VecW1TKEDY7w616OvTpu1Eh8skNo/nJp4NunBmzDfxBvc6W5HTBa7N4Le02R9t3ZEXQ6qDO 6L1bxJjYAifbAJIBG0uBas8zcuWn0XVSSZh/Qf9Sa0fvDGIkV0ZPKLWGMLcZ9iiVchT2EGCq Qru/W70HxUbP9y30iee/zSngeqntTP2XsceGaO18tZugUaP3SoDBRsOT1y5rPKlzEmkVLpix 1c8o3R06/JorQryE4e7D0bQTGO4UgA0ftlTDrYe6wSxw7uMuzqCA0hcRG5OQYlz3CMpfgAC2 liMltLvIDVgtryJVH6QnoupQSOO1Ts9djBZOHVaJecRy5y6+thi006WJjp2OPPt1rXI9SfML ydmRcTUr44ai9ICn46/9ErO695HjsmUFlNtjuk7s2TM0++YWGJHT9D0gbQ4xawZRGp8crVnl CJf8yR5xLpSZaxhbATXHI0w8EiBvp5pygH0j191BIUG/D+w4XOldo04yGggfx01aJxZJmK1P BW7VeZtCHl7ZiDCgUhfOd7ZNijX5fK4SYSNug78NLKinaSdhCfYpXozNCZ8LkjmkVQ2kLFXB HtoWZzEMJruMow+lGDeb75EidcDn3lirUuOFcGT50n2itK2OS/KIYrpxXPTN4jVGovf+16Lm zueXuPXoyhivBrWOHKKrtJDcQ5QfRDWx/ne8qRqSwJKGSI+cElJNhMb6epJlyFNz/wL/gsU1 hlRgnNl9Wc=
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  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

Bus number 0xff is valid according to the PCI spec. Using u8 typed sub_bus
and assigning 0xff to it will result in the following loop getting stuck.

    for ( ; sec_bus <= sub_bus; sec_bus++ ) {...}

Just change its type to u16 the same way that is already handled in
dmar_scope_add_buses().

Signed-off-by: Igor Druzhinin <igor.druzhinin@xxxxxxxxxx>
---
 xen/drivers/passthrough/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index fc4fa2e..48b415c 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -364,7 +364,7 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 
bus, u8 devfn)
     switch ( pdev->type = pdev_type(pseg->nr, bus, devfn) )
     {
         u16 cap;
-        u8 sec_bus, sub_bus;
+        u16 sec_bus, sub_bus;
 
         case DEV_TYPE_PCIe2PCI_BRIDGE:
         case DEV_TYPE_LEGACY_PCI_BRIDGE:
-- 
2.7.4




 


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