[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v6 1/3] xen/vpci: Move ecam access functions to common code
- To: Bertrand Marquis <Bertrand.Marquis@xxxxxxx>
- From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Date: Fri, 15 Oct 2021 11:53:38 +0200
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=GRGrxkwCGoRmDJVmWtGcVrqCKpbBMU/fv95Cgxayhus=; b=Nq5AeOQ3RvYsJaGkt75+F/TyZTnDK8Tv42oXQZnoHFkMeM/oUJ4EdnYUMg1hBril9u8U6l8lrw4AIh9lET2LM10jHdKtLe0WmpE9osMTBK8FEAyncKI8xvNnJB2AjuNqBeqOJxGsqLksbQDmeSdRhJhxR99TGBFxdqMzafuul0SUh+eUVPgIH1CNYXQupn9Z3IrjOkN1thBLQzABM4s/qSIcKsJKielzI7GX6sEvRNSmQr/wztexjKm+RsdZnDxz+NJMMgMx1qd7SxvM/rxSo//4q4t22mXvZEwR81VWYI/ZRi+agPIRhCFtT7WnzrBn2ZcDWZ+XkSrfun9bnGzDEg==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Qc1j+yKitTR5OCgnE1jGBog4CSeDGEUz218nD/Do2Ovceul6Yp1sWi7+RxKUlkRDcP81YSrcPkbNtuc8/QfEq98nkJwqepOZ/AEITDOjTnhjWZE2jRhN/4gTQVsj1kC/1h6SY/0dUd1tB5j55/NmvhKftpp3iaZDJQBi0rl1HsaT1Hw9zjRxJZFlAQ8PLB2fhycs3TCoDHMI4QLtSOBfSSv3z2uk09byKOAJv79ZVyFZtvOOBhaG3KUyy6r1fDm2I+jn5YpjI1LN+wzCJNd1AtyhHunpJ1lj8QDV/px8TO+/EsmYESjxSTkG0j7yZuaeah+s0GicPYWnFKIxOVO/sQ==
- Authentication-results: esa5.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
- Cc: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, "iwj@xxxxxxxxxxxxxx" <iwj@xxxxxxxxxxxxxx>, Paul Durrant <paul@xxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>
- Delivery-date: Fri, 15 Oct 2021 09:54:00 +0000
- Ironport-data: A9a23:9YNXRqoPqgOFETNUQrpC24ze0m9eBmKHYhIvgKrLsJaIsI4StFCzt garIBmObPmMNGDxfopybtnn9kwD6p/RmtFnSwNl/nozQi1ApZuZCYyVIHmrMnLJJKUvbq7GA +byyDXkBJppJpMJjk71atANlZT4vE2xbuKU5NTsY0idfic5Dnd84f5fs7Rh2Ncx2YHkW1rlV e7a+KUzBnf0g1aYDUpMg06zgEsHUCPa4W5wUvQWPJinjXeG/5UnJMt3yZKZdhMUdrJ8DO+iL 9sv+Znilo/vE7XBPfv++lrzWhVirrc/pmFigFIOM0SpqkAqSiDfTs/XnRfTAKtao2zhojx/9 DlCnZKXdF0sfYrIoboyb0ZZHwVeLLJ+/6CSdBBTseTLp6HHW37lwvEoB0AqJ4wIvO1wBAmi9 9RBdmpLNErawbvrnvTrEYGAhex6RCXvFJkYtXx6iynQEN4tQIzZQrWM7thdtNs1rp0STa2AP pBBAdZpRBb5WE0SOGk0MqsvhuOOmCLTcQUAt13A8MLb5ECMlVcsgdABKuH9YtWXQe1Fk0Deo XjJl0z7CBwHMN2UyRKe72mhwOTImEvTR4Y6BLC+sPlwjzW77GEJFAcfU1f9hPCjk1O/QPpWM UlS8S0rxYAi+UruQtTjUhmQpH+fogVaS9dWC/c96gyG1uzT+QnxLmkbTBZRZdo+rsg0SDc2k FiTkLvU6SdH6ePPDyjHr/HN8G30aXN9wXI+iTEsQyw4udygh4UK0D3zEddvNI6kkeXyBmSlq 9yVlxQWi7IWhM8N8qy0+1Hbnj6hzqT0oh4JChb/BT39sFsoDGKxT8nxswKDtKcfRGqMZgDZ5 CBspiSI0AwZ4XhhfgS2S+IRAKrh2f+BNDDN6bKEN8h8r2rzk5JPkIY53d2fGKuLGppbEdMKS BWK0e+02HO1FCD3BUOQS9jgY/nGNYC6SbzYugn8N7KimKRZeg6d5z1JbkWNxW3rm0VEufhhY svBKpz3UC9KU/oPIN+KqwE1iuJDKscWnju7eHwG507/jer2iIC9GN/pz2dinshmtfjZ8W05A v5UNteQygU3bQENSnK/zGLnFnhTdSJTLcmv86R/L7ffSiI7SDBJI6KAmtsJJt0695m5Y8+Vp xlRrGcDkwGh7ZAGQC3XAk1ehETHBsgi8yhiZnJxZD5FGRELOO6S0UvWTLNuFZEP/+1/1/9kC f4DfsSLGPNUTTrbvT8aaPHAQEZKLXxHXCqCYHioZiYRZZllS1Cb89PoZFK3piIPEjC2pY01p Lj5jlHXRp8KRgJDCsfKaa3wkwPt7CZFwO8iDVHVJtRzeVn39NQ4ISLGkfJqcdoHLg/Ox2XG2 l/OUwsYv+TEv6Q87MLN2fKft46sHuYnRhhaEmDX4KyYLy7f+mb/k4ZMXPzRJWLWVX/u+bXkb uJQlqmuPPoClVdMkox9D7c0kv5uu4qx/+dXl102Em/KYlKnDqJbDkOHhcQf5LdQwrJ5uBetX h7d8NdtJrjUatjuF0QcJVR5Y73bh+0UgDTb8d88PF7+uH1s5LOCXEhfY0uMhShaIOcnOY8p2 7586ssf6gj5gRs2KNeWyCtT8j3UfHAHVqwmsLAcAZPq1VV3mg0TP8SEB3+k+oyLZvVNLlIuc 22di6f1jrhBwlbPLigoHn/X0OsB3ZkDtXimFrPZy4hlTjYdusIK4Q==
- Ironport-hdrordr: A9a23:WfwB66rRu9TWtimGvRwFE+QaV5u4L9V00zEX/kB9WHVpm5Oj+f xGzc516farslossREb+expOMG7MBXhHLpOkPQs1NCZLXXbUQqTXftfBO7ZogEIdBeOk9K1uZ 0QF5SWTeeAcmSS7vyKkDVQcexQuOVvmZrA7Yy1ogYPPGMaGJ2IrT0JcTpzencGNTWubqBJba Z0iPA3wAZJLh8sH7qG7zQ+LqT+juyOsKijTQ8NBhYh5gXLpTS06ITiGxzd+hsFSTtAzZor7G CAymXCl+uemsD+7iWZ+37Y7pxQltek4txfBPaUgsxQDjn3kA6naKloRrXHljEop+OE7kosjb D30lgdFvU2z0mUUnC+oBPr1QWl+DEy60X6wVvdunfnqdyRfkNwN+NxwaZiNjfJ4Uspu99xlI hR2XiCipZRBRTc2Azg+tnhTXhR5wmJiEtntdRWo21UUIMYZrMUh5cY5llpHJAJGz+/wJw7Ed NpENrX6J9tABOnhkjizyxSKeGXLzAO9k/seDlEhiXV6UkWoJlB9Tpb+CRF9U1wsq7USPF/lq z52+pT5ehzpmJ/V9MLOA47e7rDNoX6e2OEDIujGyWUKEg5AQO4l3fW2sR+2Aj4Qu1E8HMN8K 6xJm+w81RCI37TNQ==
- Ironport-sdr: 0CoA2L2E0fZ6hI+eOTvPl7/5iiLcwAqavrJ84oFDIiICyygqoKBEhIryrPh6WLWfmTRj3olXUQ VdbhmAOU5tojjvTjB/mqBB23sB4u6tcFvf8Bq9ZFzJAgVf0ymYywLJyV2fpUr18SY8aNjMNtVK uWgHf2U7/bBUsCaMjVF3xte72WbG1qWdMYOIQXYyj14v/GSFNuw9m+QHEkOVDDjKqXpMJc8T1R jnDRvAvk+cNIFRCAwEVAn+t8LYzetEGp2zhw5slzB/W+b8ZMDEgP4ZA7EXdaCzt7Kik4CCLtrL pQUoL35NfiDf2o/HPejkVgcY
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On Fri, Oct 15, 2021 at 07:53:38AM +0000, Bertrand Marquis wrote:
> > On 15 Oct 2021, at 08:44, Roger Pau Monné <roger.pau@xxxxxxxxxx> wrote:
> > On Thu, Oct 14, 2021 at 03:49:49PM +0100, Bertrand Marquis wrote:
> >> @@ -434,25 +420,8 @@ static int vpci_mmcfg_read(struct vcpu *v, unsigned
> >> long addr,
> >> reg = vpci_mmcfg_decode_addr(mmcfg, addr, &sbdf);
> >> read_unlock(&d->arch.hvm.mmcfg_lock);
> >>
> >> - if ( !vpci_access_allowed(reg, len) ||
> >> - (reg + len) > PCI_CFG_SPACE_EXP_SIZE )
> >> - return X86EMUL_OKAY;
> >> -
> >> - /*
> >> - * According to the PCIe 3.1A specification:
> >> - * - Configuration Reads and Writes must usually be DWORD or smaller
> >> - * in size.
> >> - * - Because Root Complex implementations are not required to support
> >> - * accesses to a RCRB that cross DW boundaries [...] software
> >> - * should take care not to cause the generation of such accesses
> >> - * when accessing a RCRB unless the Root Complex will support the
> >> - * access.
> >> - * Xen however supports 8byte accesses by splitting them into two
> >> - * 4byte accesses.
> >> - */
> >> - *data = vpci_read(sbdf, reg, min(4u, len));
> >> - if ( len == 8 )
> >> - *data |= (uint64_t)vpci_read(sbdf, reg + 4, 4) << 32;
> >> + /* Ignore return code */
> >> + vpci_ecam_mmio_read(sbdf, reg, len, data);
> >
> > I think it would be better for vpci_ecam_mmio_read to just return the
> > read value, or ~0 in case of error, at least that interface would be
> > simpler and suitable for x86.
>
> I am not quite sure on this as on absolute to read ~0 is possible so the
> caller cannot distinguish between properly reading ~0 or an access allowed
> error.
How do you report an access allowed error on Arm for the PCI config
space?
At least on x86 I don't think we currently have a way to propagate
such errors, neither a plan to do so that I'm aware.
Thanks, Roger.
|