[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v3 08/11] vpci/header: Emulate PCI_COMMAND register for guests
- To: Oleksandr Andrushchenko <andr2000@xxxxxxxxx>
- From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Date: Tue, 26 Oct 2021 12:52:55 +0200
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=e0DJg+hmraSsp8QGZrIvJEFGWWT2wGpKz3HFb+iX8R0=; b=V1rJYduwde98LvNxS2RrVs7zxhaq9NaCMbD4K25QfzXJTGGqMMz6TjK1l5WAUbj7IlrDZbVOj7wOUc9p6n4UnNoNJEPazpXYRtfcltKOcU+P48S0hYdOXF1WLN3/mj3Vw2BCHNHXUC3KWbkra3RIPx3Xq/F7xyqBM9CompLDDdavdfkIA3jm/bvRj2nJcCpXe1D4R90+/UXgRSH4mfXk1dE/owQMRBAYNKjInVPTNqkzhtzKyKgiLts7L+vBg6DucY5mdQqJ0DncBCG3SlzVZKDI2LkxdIpMIr7lRgql23lQ8A+1+hZ1GBGzoJP5i5h4q5+ZR9Zc/yHY9wqMV8lqEQ==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=TwjjJ7jCW4N/rz5FpUZE3MPzOaYqhc33Up0QHLm0Ypq67CTJED0X6FxAJO5vKUWEz1Oo7/9xcrnH0kiulNtYtCA4HubZYaHD1SglkY1sR2ubYgyrQHZiEiB/Vf5b/0lMmUyenMrA7vi0KWtg3qdYK/+Kpdkp7I20mQKKciJDbhjzDr7ZVJySGMrVl5A/OplUKcal0X/ZG46N+GRo3vAix3O+R4ocJlMJZpOc+zuUjI5/aDFpL6v9oAIzl719GPy+iMSfgMDgo5Fs5DqSSFHRMofFxxCsrvF2W0I6YlsKMZcDEeiFr0ntJ9E6mg5ryKDE8JjAQRC937QvzuuiKnRJYA==
- Authentication-results: esa1.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
- Cc: <xen-devel@xxxxxxxxxxxxxxxxxxxx>, <julien@xxxxxxx>, <sstabellini@xxxxxxxxxx>, <oleksandr_tyshchenko@xxxxxxxx>, <volodymyr_babchuk@xxxxxxxx>, <Artem_Mygaiev@xxxxxxxx>, <jbeulich@xxxxxxxx>, <bertrand.marquis@xxxxxxx>, <rahul.singh@xxxxxxx>, Oleksandr Andrushchenko <oleksandr_andrushchenko@xxxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>
- Delivery-date: Tue, 26 Oct 2021 10:53:17 +0000
- Ironport-data: A9a23:6Zl/UaCzoFmoIBVW/xLlw5YqxClBgxIJ4kV8jS/XYbTApDt23jwPm jNJXDuHOauJMzH1etl+aYu29UkAu5LVyN5hQQY4rX1jcSlH+JHPbTi7wuYcHM8wwunrFh8PA xA2M4GYRCwMo/u1Si6FatANl1ElvU2zbue6WLGs1hxZH1c+EX5500w7wYbVv6Yz6TSHK1LV0 T/Ni5W31G+Ng1aY5UpNtspvADs21BjDkGtwUm4WPJinj3eH/5UhN7oNJLnZEpfNatI88thW5 Qr05OrREmvxp3/BAz4++1rxWhVirrX6ZWBihpfKMkQLb9crSiEai84G2PQghUh/sCmCg4p46 u5xh43tTxo1G6TqkeQ0ekwNe81+FfUuFL7vJHG+tYqYzlHccmuqyPJrZK00FdRGoKAtWzgIr KFGbmBWBvyAr7veLLaTUO5ji95lNMD2FIgepmth3XfSCvNOrZXrHvuWu4YAg21YasZmN6/ON +kEWCtTYQmHbgZEeVsmS5cntbL97pX4W2IB8w/EzUYt2EDZwRZtyrHrPJzQc8aTWMROtk+Co yTN+GGRKhMQOcGbyDGF2mmxneKJliT+MKo7DqG188lPkVKax2ENIBAOXF79qv684ma7WtlfI khS/TA8oKwa/VauCNL6WnWQp3qJvQUVXdZKJOQ85BuQ0arf4wufBW8sQyZIbZots8pebSYj1 kKN2cjoAzNvmLSPTDSW8bL8hTGvPSkYK0cSaClCShEKi/HzrYd2gh/RQ9JLFK+uksazCTz22 yqNriU1m/MUl8Fj/6y98Uqd22r0jpfMRw8xoA7QWwqN8AR9Y4K0Yp2y3lLS5/1AMYWxQ0GIu T4PnM32xOcKAJKWnSqBWtIRDaqp7PaINj7bqVN3Fpxn/DOok1a4ZpxZ6jx6IEZvM+4HdCXvb UuVvhlejKK/J1PzM/UxOdjoTZ13k+6wTrwJS8w4cPJ1fpNtLgalxx1cdBOWwnzImW4lkYgWb MLzndmXMV4WDqFuzTyTTugb0KM2yi1W+V4/VawX3Dz8juLAPC/9paMtdQLUNLhgvfzsTBD9q o4Hb6O3JwNjvPoSi8U92bUYKkwWNjAFDJTypt0/mgWrc1c+Rj9J5xM8x9ocl21Zc0Z9yrigE pKVABYwJL/DaZrvcl3iV5ybQOmzNauTVFpiVcDWAX6m2mI4faGk57oFep08cNEPrbI4kKckH 6BUKpXRU5yjrwgrHBxGNfHAQHFKLkz31WpiwQL8OFDTgKKMtySWo4S5L2MDBQEFDzattNtWn lFT/lizfHb3fCw7VJy+QKv2lzuZ5CFB8MovDxqgCoQCIy3Erdk1QxEde9dqeqng3z2YnWDEv +tXaD9FzdTwT3gdqomV2fnf9Nf3SIOT3CNyRgHm0Fp/DgGDlkKLyo5cSueYOzfbUWL/4qK5Y utJifr7NZU6cJxi6tAU/29Dwf1s6t3xiaVdywg4TnzHY07yUuFrI2Wc3NkJvapIn+cLtQyzU 0OJ299bJbTWZ5+1TA9PfFIoPraZyPUZujjO9vBpck/00zB6oeicWkJIMhjS1CEEdOlpMJkoy PsKsdIN71DtkQIjN9uL13gG92mFInEafb8gs5UWXN3ihgYxkwkQap3AEC7mppqIbowUYEUtJ zaVgovEhqhdmRWeIyZiSyCV0LME15oUuR1MwFsTHHizm4LI1q0twRlc0TUrVQAJnB9J5P1+Z zpwPEpvKKTQozox3JpfX3qhEh1qDQGC/hCj0EMAkWDUQhX6VmHJK2Fha++B8FpArjBZdzlfu rqZ1HzkQXDhe8Sohnk+XktsqvrCS91t91KdxJD7TprdR5RqMyD4hqKOZHYTr0q1CMw8s0TLu O128bsicqb8LyMR//U2BoTyOW78k/xYyLiumc1cwZ4=
- Ironport-hdrordr: A9a23:NscAM6Gf5Gtb18EepLqFDJHXdLJyesId70hD6qkvc3Nom52j+/ xGws536faVslcssHFJo6HmBEClewKnyXcV2/hrAV7GZmfbUQSTXeNfBOfZsljd8mjFh5NgPM RbAtZD4b/LfCFHZK/BiWHSebZQo6j3zEnrv5an854Ed3AUV0gK1XYeNu/0KDwTeOEQbqBJaK Z0q/A37AaISDAyVICWF3MFV+/Mq5nik4/nWwcPA1oC5BOVhT2lxbbmG1zAty1uHg9n8PMHyy zoggb57qKsv7WSzQLd7Xba69BzlMH6wtVOKcSQgow+KynqiCyveIN9Mofy9gwdkaWK0hIHgd PMqxAvM4Ba7G7QRHi8pV/X1wzpwF8Vmgnf4G7dpUGmjd3yRTo8BcYEr5leaAHl500pu8w5+L 5X3kqC3qAnQy/orWDY3ZzlRhtqnk27rT4JiugIlUFSVoMYdft4sZEfxkVIC50NdRiKp7zPKN MeTP002cwmMm9zNxvizytSKZ2XLzgO9y69Mwk/Upf/6UkSoJh7p3Fos/D30E1wsK7VcKM0lN gsBJ4Y4I2mfvVmHZ6VO91xM/dfKla9CC4kY1jiaWgOKsk8SgfwQtjMkfII2N0=
- Ironport-sdr: GOm1eWylw8y76vFLr18RfXqx11DTugJicEnPzwNUb8mBFTtlsFyOFOqE0SvVzsyipT6wVyn4LP DURzZ/+ltzSAyadmPVbdGQfTCGxFFJbL9TyjUhSiiSURw6WUaI4Xcce7Mw7rGez5rw2iQrOVaI Jo1GtAM7U1hDum09ol8KVU22f5LIbF3BHI3kEIAnQSB4zak5avJCkDakCamDhExl6jf7t1I11B tU4QPrXpgKJyHldrGxbX2whndU9PkvEd1UseFFZPv9sO9hLD0dbaOt9s8CU+ChgSe9mMFPPGjW dinNeZU48ADmvVWg1X8/1DGR
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On Thu, Sep 30, 2021 at 10:52:20AM +0300, Oleksandr Andrushchenko wrote:
> From: Oleksandr Andrushchenko <oleksandr_andrushchenko@xxxxxxxx>
>
> Add basic emulation support for guests. At the moment only emulate
> PCI_COMMAND_INTX_DISABLE bit, the rest is not emulated yet and left
> as TODO.
>
> Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@xxxxxxxx>
> Reviewed-by: Michal Orzel <michal.orzel@xxxxxxx>
> ---
> New in v2
> ---
> xen/drivers/vpci/header.c | 35 ++++++++++++++++++++++++++++++++---
> 1 file changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
> index f23c956cde6c..754aeb5a584f 100644
> --- a/xen/drivers/vpci/header.c
> +++ b/xen/drivers/vpci/header.c
> @@ -451,6 +451,32 @@ static void cmd_write(const struct pci_dev *pdev,
> unsigned int reg,
> pci_conf_write16(pdev->sbdf, reg, cmd);
> }
>
> +static void guest_cmd_write(const struct pci_dev *pdev, unsigned int reg,
> + uint32_t cmd, void *data)
> +{
> + /* TODO: Add proper emulation for all bits of the command register. */
> +
> + if ( (cmd & PCI_COMMAND_INTX_DISABLE) == 0 )
> + {
> + /*
> + * Guest wants to enable INTx. It can't be enabled if:
> + * - host has INTx disabled
> + * - MSI/MSI-X enabled
> + */
> + if ( pdev->vpci->msi->enabled )
> + cmd |= PCI_COMMAND_INTX_DISABLE;
> + else
> + {
> + uint16_t current_cmd = pci_conf_read16(pdev->sbdf, reg);
> +
> + if ( current_cmd & PCI_COMMAND_INTX_DISABLE )
> + cmd |= PCI_COMMAND_INTX_DISABLE;
> + }
This last part should be Arm specific. On other architectures we
likely want the guest to modify INTx disable in order to select the
interrupt delivery mode for the device.
I really wonder if we should allow the guest to play with any other
bit apart from INTx disable and memory and IO decoding on the command
register.
Thanks, Roger.
|