Re: [XEN v2] xen/arm64: io: Decode 32-bit ldr/str post-indexing instructions

[Jan Beulich <jbeulich@xxxxxxxx>]

On 30.11.2021 19:35, Ayan Kumar Halder wrote:
> On 30/11/2021 07:57, Jan Beulich wrote:
>> On 29.11.2021 20:16, Ayan Kumar Halder wrote:
>>> +{
>>> +    struct cpu_user_regs *regs = guest_cpu_user_regs();
>>> +    unsigned int val;
>>> +
>>> +    val = get_user_reg(regs, instr->code.rn);
>>> +    val += instr->code.imm9;
>>> +    set_user_reg(regs, instr->code.rn, val);
>>
>> I don't think this handles the SP case correctly, and I also don't see
>> that case getting rejected elsewhere.
> 
> Sorry, I did not understand you. Can you explain a bit more ?
> 
> Following 
> https://www.keil.com/support/man/docs/armasm/armasm_dom1361289873425.htm 
> , Are you saying that we need to handle this restriction
> "You can use SP for Rt in non-word instructions in ARM code but this is 
> deprecated in ARMv6T2 and above"

Are you looking at the correct (part of the) doc? It feels like this is
Arm32 wording (plus it's Rn I'm talking about, not Rt) ... DDI0487G-b
has nothing like this on the "LDR (immediate)" insn page. And even if
it had, "deprecated" doesn't mean "impossible", so you'd still need to
deal with the situation in a way that's not silently doing the wrong
thing (IOW you may be fine not actually emulating the case, but then
you need to clearly fail emulation rather than using XZR).

I have to admit I don't recall what the behavior is when Rt == 31. But
what you may further want to deal with independent of that is Rt == Rn.

Jan