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[PATCH 0/6] x86: Changes for Intel Feb 2022 microcode
- To: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Date: Tue, 8 Feb 2022 18:09:36 +0000
- Authentication-results: esa2.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none
- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Delivery-date: Tue, 08 Feb 2022 18:10:05 +0000
- Ironport-data: A9a23:iy86/K8Epf0eTHqGQ3bUDrUDo3mTJUtcMsCJ2f8bNWPcYEJGY0x3y 2EfWjrSPa2OMDCkf4p1YNu+9xwEusCHzd4wGgJr+3s8E34SpcT7XtnIdU2Y0wF+jyHgoOCLy +1EN7Es+ehtFie0Si9AttENlFEkvU2ybuOU5NXsZ2YhFWeIdA970Ug5w7Rh0tYy6TSEK1jlV e3a8pW31GCNg1aYAkpMg05UgEoy1BhakGpwUm0WPZinjneH/5UmJMt3yZWKB2n5WuFp8tuSH I4v+l0bElTxpH/BAvv9+lryn9ZjrrT6ZWBigVIOM0Sub4QrSoXfHc/XOdJFAXq7hQllkPhQk tt1kK6+Zjw2L7Xps/UgWBJcQ2JhaPguFL/veRBTsOSWxkzCNXDt3+9vHAc9OohwFuRfWD8Us 6ZCcXZUM07F17neLLGTE4GAguwKKsXxMZxZkXZn1TzDVt4tQIzZQrWM7thdtNs1rp4VQqiEO ZRIAdZpRD7bR0F/Nlk3NJUjuLeXu2TtSzxUkV3A8MLb5ECMlVcsgdABKuH9atGMAMlYgEucj mbH5HjiRAEXMsSFzjiI+W7qgfXA9R4XQ6pLSuf+rKQzxgTOmCpDU3X6SGdXv9GY0ECGfuBRB HcL6zILhrkP/0evHpriCkjQTGG/gjYQXN9ZEusf4Q6Ly7bJ7wvxOlXoXgKte/R96pZoGGVCO kuh2oqwWGcx6OH9pWe1q+/MxQ5eLxT5OoPricUsaQIeq+fur4go5v4kZoYySfXl5jEZ9NyZ/ txrkMTcr+hJ5SLo///ilbwiv95LjsKYJjPZHi2NAgqYAvpRPeZJnbCA51nB9upnJ42EVFSHt 3Vss5HAsLxXXMjUyn3XGb5l8FSVCxGtamy0vLKSN8N5q2TFF4CLIei8Hw2S1G82a51ZKFcFk WfYuB9L5Y87AZdZRfQfXm5FMOxzlfKIPY28Dpj8N4MSCrAsJF7v1Hw/Pia4gjGy+GByyvtXE cnALq6R4YMyVP0PIMyeHLxGj9fGB0kWmAvueHwM507/juPFOSXFEOxt3ZnnRrlR0Z5oaT79q 753X/ZmAT0GOAEnSiWIo4MVM34QKn03WcL/p8BNL7bRKQt6AmAxTfTWxOp5KYBimq1UkMbO/ 228BRAEmAau2yWfJFXYcG1nZZPuQY178SAxMxszMAv6wHMke4uusvsSLsNlYbk9+eV/5vdoV P1ZKd6YC/FCR22fqTQQZJXwtqJ4cxGviV7cNiapemFnLZVhWxbI6pnveQ62rHsCCS++tM0fp by811yEHcpfFlo6VMuPMaCh1VK8u3QZidleZUqQL4kBYljo/ahrNzf10q09LfYTJEiR3TCdz QuXX0sV/LGfv48v/dDVrqmYtIP1QfBmF09XEmSHv7a7MS7WojiqzYNaCbvaeDncUCX/+bm4Z PUTxPb5aaVVkFFPuot6MrBq0aNhuIe/++4EllxpTCfRclCmKrJ8OX3Xj8BAu5pEyqJdpQbrC FmE/cNXOOnRNc7oeLLLyNHJsghXOSkopwTv
- Ironport-hdrordr: A9a23:8s2yjqDe3thWNRDlHem655DYdb4zR+YMi2TC1yhKJyC9E/bo8P xG88566faZslossRIb6LS90cu7MBDhHPdOiOF7V9qftWHdyQ6VxepZjLcKrQeOJ8SHzJ8+6Z td
- Ironport-sdr: IRLRDnSqC0pCtb6uu4IVpteITDI4nwXYX5AkdbXNQ/wuz82hdM8xq3oUVsAD9BVgslIO8LGutt 0cClFkIFjNjenMB/YBlKqQeHU1HptXXjj6KlWeBTa1uq5srMh4wAMnv43JSuqTZ6qSjjE9zXNh ONdhvTrO/06qLraeHMpZzftQHXXQ6RWm28lCroRqHNBluGlc/LyjxDIZ33jbEP86QDpxeYoaNW RFSkYxUHqL09TjyZWucC+rLAYZ/0DthbqV7bsqxNZWBeEnaPJn4HWFfO989qiCoMFmaRjqLbpO gGen/8GkEUucBFznZ3O+NORD
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
Changes for two software visible changes in the Intel Feb 2022 microcode drop.
1) Deprecation of TSX on more client parts
2) Retrofitting of AMD's MSR_SPEC_CTRL.PSFD to various CPUs
These patches have been committed and backported to 4.14 and later.
Andrew Cooper (6):
x86/spec-ctrl: Clean up MSR_MCU_OPT_CTRL handling
x86/tsx: Move has_rtm_always_abort to an outer scope
x86/tsx: Cope with TSX deprecation on WHL-R/CFL-R
tests/tsx: Extend test-tsx to check MSR_MCU_OPT_CTRL
x86/cpuid: Infrastructure for cpuid word 7:2.edx
x86/spec-ctrl: Support Intel PSFD for guests
docs/misc/xen-command-line.pandoc | 25 +++++--
tools/libs/light/libxl_cpuid.c | 2 +
tools/misc/xen-cpuid.c | 6 ++
tools/tests/tsx/test-tsx.c | 9 ++-
xen/arch/x86/acpi/power.c | 3 +-
xen/arch/x86/cpu/common.c | 4 ++
xen/arch/x86/cpu/intel.c | 32 +++++++++
xen/arch/x86/include/asm/cpufeature.h | 1 +
xen/arch/x86/include/asm/msr-index.h | 2 +
xen/arch/x86/include/asm/processor.h | 3 +
xen/arch/x86/include/asm/spec_ctrl.h | 2 -
xen/arch/x86/msr.c | 2 +-
xen/arch/x86/platform_hypercall.c | 3 +
xen/arch/x86/smpboot.c | 3 +-
xen/arch/x86/spec_ctrl.c | 52 +++++++-------
xen/arch/x86/tsx.c | 102 ++++++++++++++++++++++++----
xen/include/public/arch-x86/cpufeatureset.h | 3 +
xen/include/xen/lib/x86/cpuid.h | 13 +++-
xen/tools/gen-cpuid.py | 2 +-
19 files changed, 211 insertions(+), 58 deletions(-)
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2.11.0
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