[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v2 2/3] amd/msr: allow passthrough of VIRT_SPEC_CTRL for HVM guests


  • To: Roger Pau Monne <roger.pau@xxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Mon, 28 Mar 2022 16:02:40 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=nkZZGbFQopAsIAhzn7WIyzzHOx6GY3IahxcyuC1w5Jc=; b=PbWIFODQpMcnNbrWiAIgHhJS22cBPjsPj2+3ACGBavorumwNji8rC0Qtg5wb1w4RRo2Rl9sJqh2yfVIxZcfyO6JnTraBW5knWa+k3zNAdqH/VWkE2E/D592Np3BU160jY/GQ+EjvMKGVKvUVzUysZ5fBJTiLjBzeBOYBPC0Dwa4q8+Pm4SkfsoYtiYKkxkvokQcqUJYNy4iWuOx47kWyHG0vgng+6Ugj0mJx3n9lXK/H+liDtoTEIjZlbWxHq58TNVQHxa8TgTK+d82mH4PGkWHR8athSePwCOzbkPAn+qNQA/8xtw/OC7JVDUQsJxEDN6/xvIzWMK1fz7jYRYNlRQ==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=UMVR1aG2Mv/a0k85EMnOeFC7EU9fHCXOF98dcPdQwOsSnskF5NmMk08T2UrJSRWBF+TjR7KvW81VquFARP8tLSoNWR04P35PdUCDSlUs7YzJbqObpJuYLHbsCwn0OlMXQDxyot0hmj8Uvngv28/jfEj8GjssbC7fmpRdp+k48cCpd06ANvG7UBZjhsXisV2tx1pgbm/bXT4oYwUp8cdRTritZNyRVhQW4DDXvnaX3xCksokr4RCHr9W5LlJAOkErl1PgfUYI+ZuZTqVo1jz52FCPZGTRdug7ncyVZ3cjW+XB3B/pPOW//djZlOYS18f20JiZ3DdRz4PpjSALaFyBXA==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com;
  • Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
  • Delivery-date: Mon, 28 Mar 2022 14:02:50 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 15.03.2022 15:18, Roger Pau Monne wrote:
> Allow HVM guests untrapped access to MSR_VIRT_SPEC_CTRL if the
> hardware has support for it. This requires adding logic in the
> vm{entry,exit} paths for SVM in order to context switch between the
> hypervisor value and the guest one. The added handlers for context
> switch will also be used for the legacy SSBD support.
> 
> Introduce a new synthetic feature leaf (X86_FEATURE_VIRT_SC_MSR_HVM)
> to signal whether VIRT_SPEC_CTRL needs to be handled on guest
> vm{entry,exit}.
> 
> Note the change in the handling of VIRT_SSBD in the featureset
> description. The change from 's' to 'S' is due to the fact that now if
> VIRT_SSBD is exposed by the hardware it can be passed through to HVM
> guests.

But lower vs upper case mean "(do not) expose by default", not whether
underlying hardware exposes the feature. In patch 1 you actually used
absence in underlying hardware to justify !, not s.

> @@ -610,6 +611,14 @@ static void cf_check svm_cpuid_policy_changed(struct 
> vcpu *v)
>      svm_intercept_msr(v, MSR_SPEC_CTRL,
>                        cp->extd.ibrs ? MSR_INTERCEPT_NONE : MSR_INTERCEPT_RW);
>  
> +    /*
> +     * Give access to MSR_VIRT_SPEC_CTRL if the guest has been told about it
> +     * and the hardware implements it.
> +     */
> +    svm_intercept_msr(v, MSR_VIRT_SPEC_CTRL,
> +                      cp->extd.virt_ssbd && cpu_has_virt_ssbd ?

Despite giving the guest direct access guest_{rd,wr}msr() can be hit
for such guests. Don't you need to update what patch 1 added there?

Also, is there a reason the qualifier here is not in sync with ...

> @@ -3105,6 +3114,36 @@ void svm_vmexit_handler(struct cpu_user_regs *regs)
>      vmcb_set_vintr(vmcb, intr);
>  }
>  
> +/* Called with GIF=0. */
> +void vmexit_virt_spec_ctrl(void)
> +{
> +    unsigned int val = opt_ssbd ? SPEC_CTRL_SSBD : 0;
> +
> +    if ( cpu_has_virt_ssbd )

... this one? Since the patching is keyed to VIRT_SC_MSR_HVM, which in
turn is enabled only when cpu_has_virt_ssbd, it would seem to me that
if any asymmetry was okay here, then using cp->extd.virt_ssbd without
cpu_has_virt_ssbd.

> @@ -1069,6 +1072,10 @@ void __init init_speculation_mitigations(void)
>              setup_force_cpu_cap(X86_FEATURE_SC_MSR_HVM);
>      }
>  
> +    /* Support VIRT_SPEC_CTRL.SSBD if AMD_SSBD is not available. */
> +    if ( opt_msr_sc_hvm && !cpu_has_amd_ssbd && cpu_has_virt_ssbd )
> +        setup_force_cpu_cap(X86_FEATURE_VIRT_SC_MSR_HVM);

In cpuid.c the comment (matching the code there) talks about exposing
by default. I can't bring this in line with the use of !cpu_has_amd_ssbd
here.

Jan




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.