[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] arm/its: enable LPIs before mapping the collection table


  • To: Julien Grall <julien@xxxxxxx>
  • From: Rahul Singh <Rahul.Singh@xxxxxxx>
  • Date: Wed, 4 May 2022 12:21:35 +0000
  • Accept-language: en-US
  • Arc-authentication-results: i=2; mx.microsoft.com 1; spf=pass (sender ip is 63.35.35.123) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=arm.com] dkim=[1,1,header.d=arm.com] dmarc=[1,1,header.from=arm.com])
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none
  • Arc-message-signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=PXi5+ByetQA4DsgMU9oucBblz1aUs+i897kCw50ipuA=; b=Ne1nbgg3mZSgTOL1fhFoaRQRlV3A8QLBZWJQ4KifpmkN1M55QwydAu51bcJgbFG/EbR/AEDu+fM4ijw5suwKccXkYSzQqM3LFc08sTgve8J9Qa0mdIPsRV3+DRRm6pRWQtI2RZ5iHWDGV644mmv9liwCa4h3ofAO37X1h2ibpOYgUSACto17QATRpHzXPl3uMfJA1NvnEM66b/P3KMjq325+ZODNwMZ06I+HZ9+emgM7EckwJNM2GyNGdKVE42bjOpvHwM5wcCqrbP+64eeTEGUWVz0k1n/Vt4cciNSedckavHFU1KNCXCSHL38EZNzaoz6VOguaunNxJGDPwa9UtQ==
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=PXi5+ByetQA4DsgMU9oucBblz1aUs+i897kCw50ipuA=; b=nH1dB2nTPPkZGzjpe01Wa77DFJPoFFtKjH2HlSwQYczK7dcFFhw6ukTAmUytqP/vM1I2CAZRQLWl4VDSGM9u4+SDtM7h+N9qN7fNa9Zy59R9DPGxEeGYqJJxq7ytW+79vRGrV+fK3sBH08wa1h1niZsZ788XC4cxi0OzySDZKhH5QXfPMXKtXMub6LpuuEaM9EdMI9bdo4FN+qxKqCteOwr+MwuczBbP+t1JA4ylm0PcMXqHAsIDLjcTAJVaBZzR+vbqZbo0GrMKrdOUeBed+Yq6hXd+4QVCX+aKvje81LGl2LP9p2+vjZ6vfsepGYRbBoQeGtaj81WFkJV0wjs1sQ==
  • Arc-seal: i=2; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=pass; b=QAw4A3ql79FmKia3EbNbDjTpo/5Lxx+ssUn2OOjRZz2WG+ocD/dYthrIH74oh62RRkZQw2q/i1E6pwAGZnteaDPYNlqRUiUNp4o8cTLodbXbI/KZ9ADyu6p7iFWWTAEhJ3rmq8NA/mYvf8Rcp4+EzpQf1owEfZbJTZuR0toqNEMEBwCthZaDZyJ4gI9s2tJhXtnwcOOS5Z8vYsCI8DzjHIsZn6tvbfXlVXHX50mEJk5ISho6ROo6pVAlPOhztb9zxjjc/KektrbDSh2tbWvWIXIiFHnqHuuriK/sPxsgFEBtvRuMS56jz6Bog616tTQPGc2mgYtKJXb/JeeE41rMdg==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bqhukKvyl0IiNt/IKDFFIxjW9dtn8whQIrP6HHFLtyyAbx5j97ppRE3AmitupaTfGzyi2TKRL4Q4l94MGTAFQr6bfxtIHw5OEpm6fkb5iZLw0DAISk31M2MtJApxVAwseRKOoqy4d+Np8uZnhx2Zk6OSfm+o2U31sz0/eGJeCoRJA2tX8nJQH9ibyip/WobgtePhRfI+pna1lSy73UD7h/QbNBueVgLkZ/l000ghCzgIV5aMGxPGX5BY1WZ10CiNSqz60Fw206HCgAYLDio3nN9jCS9LMQHofsmJ49bVunuJiJpvVEtycpRXKfEa+We/EKp1tqc87AFy6a4kPblaJQ==
  • Authentication-results-original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com;
  • Cc: xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Bertrand Marquis <Bertrand.Marquis@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Delivery-date: Wed, 04 May 2022 12:22:17 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Nodisclaimer: true
  • Original-authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com;
  • Thread-index: AQHYWlHsf41jIOfeQ0mX6M++noloAq0NWJOAgAFGKQCAAAlngIAABjSA
  • Thread-topic: [PATCH] arm/its: enable LPIs before mapping the collection table

Hi Julien,

> On 4 May 2022, at 12:59 pm, Julien Grall <julien@xxxxxxx> wrote:
> 
> Hi,
> 
> On 04/05/2022 12:25, Rahul Singh wrote:
>>> On 3 May 2022, at 4:58 pm, Julien Grall <julien@xxxxxxx> wrote:
>>> On 27/04/2022 17:14, Rahul Singh wrote:
>>>> MAPC_LPI_OFF ITS command error can be reported to software if LPIs are
>>>> not enabled before mapping the collection table using MAPC command.
>>>> Enable the LPIs using GICR_CTLR.EnableLPIs before mapping the collection
>>>> table.
>>>> Signed-off-by: Rahul Singh <rahul.singh@xxxxxxx>
>>>> ---
>>>> xen/arch/arm/gic-v3.c | 4 ++--
>>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>>> diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
>>>> index 3c472ed768..8fb0014b16 100644
>>>> --- a/xen/arch/arm/gic-v3.c
>>>> +++ b/xen/arch/arm/gic-v3.c
>>>> @@ -812,11 +812,11 @@ static int gicv3_cpu_init(void)
>>>> /* If the host has any ITSes, enable LPIs now. */
>>>> if ( gicv3_its_host_has_its() )
>>>> {
>>>> + if ( !gicv3_enable_lpis() )
>>>> + return -EBUSY;
>>> 
>>> gicv3_enable_lpis() is using writel_relaxed(). So in theory, the write may 
>>> not be visible before gicv3_its_setup_collection() send the command.
>> Agree.
>>> 
>>> So I think we need to add an smp_wmb() to ensure the ordering with a 
>>> comment explaning why this is necessary.
>> Or maybe be we can change the writer_relaxed() to writel() that will also 
>> work.
>> -    writel_relaxed(val | GICR_CTLR_ENABLE_LPIS, GICD_RDIST_BASE + 
>> GICR_CTLR);
>> +    writel(val | GICR_CTLR_ENABLE_LPIS, GICD_RDIST_BASE + GICR_CTLR);
> 
> writel() guarantees the previous writes are observed before this write. But 
> it would not guarantee that the write will be observed before the ones after.
> 
> Also, after further thoughts, I think this wants to be wmb() (system-wide) 
> rather than smp_wmb() (innershearable).
> 

Ok. I will use the wmb() and will send the next version.

Regards,
Rahul




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.