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Re: [PATCH 3/3] xen/arm: Add sb instruction support
- To: Julien Grall <julien@xxxxxxx>
- From: Bertrand Marquis <Bertrand.Marquis@xxxxxxx>
- Date: Mon, 9 May 2022 10:08:36 +0000
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- Delivery-date: Mon, 09 May 2022 10:08:56 +0000
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- Thread-topic: [PATCH 3/3] xen/arm: Add sb instruction support
Hi Julien,
> On 4 May 2022, at 09:06, Julien Grall <julien@xxxxxxx> wrote:
>
>
>
> On 04/05/2022 08:24, Bertrand Marquis wrote:
>> Hi Julien,
>
> Hi Bertrand,
>
>>> On 3 May 2022, at 19:47, Julien Grall <julien@xxxxxxx> wrote:
>>>> A new cpuerrata capability is introduced to enable the alternative
>>>
>>> 'sb' is definitely not an erratum. Errata are for stuff that are meant to
>>> be specific to one (or multiple) CPU and they are not part of the
>>> architecture.
>>>
>>> This is the first time we introduce a feature in Xen. So we need to add a
>>> new array in cpufeature.c that will cover 'SB' for now. In future we could
>>> add feature like pointer auth, LSE atomics...
>> I am not quite sure why you would want to do that.
>> Using the sb instruction is definitely something to do to solve erratas, if
>> a CPU is not impacted by those erratas, why would you want to use this ?
>
> I agree that SB is used to solve errata but the instruction itself is not a
> workaround (it may be part of it though). Instead, this is a more efficient
> way to prevent speculation and will replace dsb/isb.
>
> Speculation is never going to disappear from processor. So, in the future,
> there might be valid reason for us to say "We don't want the processor to
> speculate". This would mean using SB.
If the need arise then we will check depending on that how we can support it
but in the current status as there is no use case I don’t think we need that.
Cheers
Bertrand
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