[RFC PATCH 04/12] xue: add support for selecting specific xhci

[Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx>]

Handle parameters similar to dbgp=ehci.

Implement this by not resettting xhc_cf8 again in xue_init_xhc(), but
using a value found there if non-zero. Additionally, add xue->xhc_num to
select n-th controller.

Signed-off-by: Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx>
---
 docs/misc/xen-command-line.pandoc |  5 ++++-
 xen/drivers/char/xue.c            | 17 ++++++++++++++-
 xen/include/xue.h                 | 38 +++++++++++++++++++-------------
 3 files changed, 45 insertions(+), 15 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc 
b/docs/misc/xen-command-line.pandoc
index 881fe409ac76..37a564c2386f 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -721,10 +721,15 @@ Available alternatives, with their meaning, are:
 
 ### dbgp
 > `= ehci[ <integer> | @pci<bus>:<slot>.<func> ]`
+> `= xue[ <integer> | @pci<bus>:<slot>.<func> ]`
 
 Specify the USB controller to use, either by instance number (when going
 over the PCI busses sequentially) or by PCI device (must be on segment 0).
 
+Use `ehci` for EHCI debug port, use `xue` for XHCI debug capability.
+Xue driver will wait indefinitely for the debug host to connect - make sure the
+cable is connected.
+
 ### debug_stack_lines
 > `= <integer>`
 
diff --git a/xen/drivers/char/xue.c b/xen/drivers/char/xue.c
index 98334090c078..632141715d4d 100644
--- a/xen/drivers/char/xue.c
+++ b/xen/drivers/char/xue.c
@@ -125,6 +125,7 @@ void __init xue_uart_init(void)
 {
     struct xue_uart *uart = &xue_uart;
     struct xue *xue = &uart->xue;
+    const char *e;
 
     if ( strncmp(opt_dbgp, "xue", 3) )
         return;
@@ -132,6 +133,22 @@ void __init xue_uart_init(void)
     memset(xue, 0, sizeof(*xue));
     memset(&xue_ops, 0, sizeof(xue_ops));
 
+    if ( isdigit(opt_dbgp[3]) || !opt_dbgp[3] )
+    {
+        if ( opt_dbgp[3] )
+            xue->xhc_num = simple_strtoul(opt_dbgp + 3, &e, 10);
+    }
+    else if ( strncmp(opt_dbgp + 3, "@pci", 4) == 0 )
+    {
+        unsigned int bus, slot, func;
+
+        e = parse_pci(opt_dbgp + 7, NULL, &bus, &slot, &func);
+        if ( !e || *e )
+            return;
+
+        xue->xhc_cf8 = (1UL << 31) | (bus << 16) | (slot << 11) | (func << 8);
+    }
+
     xue->dbc_ctx = &ctx;
     xue->dbc_erst = &erst;
     xue->dbc_ering.trb = evt_trb;
diff --git a/xen/include/xue.h b/xen/include/xue.h
index 6048dcdd5509..b1f304958679 100644
--- a/xen/include/xue.h
+++ b/xen/include/xue.h
@@ -998,6 +998,7 @@ struct xue {
     int dma_allocated;
     int open;
     int sysid;
+    int xhc_num; /* look for n-th xhc */
 };
 
 static inline void *xue_mset(void *dest, int c, uint64_t size)
@@ -1068,24 +1069,31 @@ static inline int xue_init_xhc(struct xue *xue)
 
     struct xue_ops *ops = xue->ops;
     void *sys = xue->sys;
-    xue->xhc_cf8 = 0;
 
-    /*
-     * Search PCI bus 0 for the xHC. All the host controllers supported so far
-     * are part of the chipset and are on bus 0.
-     */
-    for (devfn = 0; devfn < 256; devfn++) {
-        uint32_t dev = (devfn & 0xF8) >> 3;
-        uint32_t fun = devfn & 0x07;
-        uint32_t cf8 = (1UL << 31) | (dev << 11) | (fun << 8);
-        uint32_t hdr = (xue_pci_read(xue, cf8, 3) & 0xFF0000U) >> 16;
-
-        if (hdr == 0 || hdr == 0x80) {
-            if ((xue_pci_read(xue, cf8, 2) >> 8) == XUE_XHC_CLASSC) {
-                xue->xhc_cf8 = cf8;
-                break;
+    if (xue->xhc_cf8 == 0) {
+        /*
+         * Search PCI bus 0 for the xHC. All the host controllers supported so 
far
+         * are part of the chipset and are on bus 0.
+         */
+        for (devfn = 0; devfn < 256; devfn++) {
+            uint32_t dev = (devfn & 0xF8) >> 3;
+            uint32_t fun = devfn & 0x07;
+            uint32_t cf8 = (1UL << 31) | (dev << 11) | (fun << 8);
+            uint32_t hdr = (xue_pci_read(xue, cf8, 3) & 0xFF0000U) >> 16;
+
+            if (hdr == 0 || hdr == 0x80) {
+                if ((xue_pci_read(xue, cf8, 2) >> 8) == XUE_XHC_CLASSC) {
+                    if (xue->xhc_num--)
+                        continue;
+                    xue->xhc_cf8 = cf8;
+                    break;
+                }
             }
         }
+    } else {
+        /* Verify if selected device is really xHC */
+        if ((xue_pci_read(xue, xue->xhc_cf8, 2) >> 8) != XUE_XHC_CLASSC)
+            xue->xhc_cf8 = 0;
     }
 
     if (!xue->xhc_cf8) {
-- 
git-series 0.9.1