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Re: [PATCH 3/7] xen/arm: head: Add missing isb after writing to SCTLR_EL2/HSCTLR
- To: Julien Grall <julien@xxxxxxx>
- From: Bertrand Marquis <Bertrand.Marquis@xxxxxxx>
- Date: Mon, 27 Jun 2022 14:00:40 +0000
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- Cc: xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Julien Grall <jgrall@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
- Delivery-date: Mon, 27 Jun 2022 14:00:57 +0000
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- Thread-topic: [PATCH 3/7] xen/arm: head: Add missing isb after writing to SCTLR_EL2/HSCTLR
Hi Julien,
> On 24 Jun 2022, at 10:11, Julien Grall <julien@xxxxxxx> wrote:
>
> From: Julien Grall <jgrall@xxxxxxxxxx>
>
> Write to SCTLR_EL2/HSCTLR may not be visible until the next context
> synchronization. When initializing the CPU, we want the update to take
> effect right now. So add an isb afterwards.
>
> Spec references:
> - AArch64: D13.1.2 ARM DDI 0406C.d
> - AArch32 v8: G8.1.2 ARM DDI 0406C.d
> - AArch32 v7: B5.6.3 ARM DDI 0406C.d
>
> Signed-off-by: Julien Grall <jgrall@xxxxxxxxxx>
Reviewed-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>
Cheers
Bertrand
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