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RE: [PATCH 00/11] x86: support AVX512-FP16
- To: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Henry Wang <Henry.Wang@xxxxxxx>
- Date: Wed, 6 Jul 2022 07:31:23 +0000
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- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>
- Delivery-date: Wed, 06 Jul 2022 07:38:17 +0000
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- Thread-topic: [PATCH 00/11] x86: support AVX512-FP16
Hi,
It seems that this series has been stale for nearly a month, with nothing heard
from maintainers. So I am sending this email as a gentle reminder for
maintainers.
Thanks!
Kind regards,
Henry
> -----Original Message-----
> Subject: [PATCH 00/11] x86: support AVX512-FP16
>
> While I (quite obviously) don't have any suitable hardware, Intel's
> SDE allows testing the implementation. And since there's no new
> state (registers) associated with this ISA extension, this should
> suffice for integration.
>
> 01: CPUID: AVX512-FP16 definitions
> 02: handle AVX512-FP16 insns encoded in 0f3a opcode map
> 03: handle AVX512-FP16 Map5 arithmetic insns
> 04: handle AVX512-FP16 move insns
> 05: handle AVX512-FP16 fma-like insns
> 06: handle AVX512-FP16 Map6 misc insns
> 07: handle AVX512-FP16 complex multiplication insns
> 08: handle AVX512-FP16 conversion to/from (packed) int16 insns
> 09: handle AVX512-FP16 floating point conversion insns
> 10: handle AVX512-FP16 conversion to/from (packed) int{32,64} insns
> 11: AVX512-FP16 testing
>
> While I've re-based this ahead of the also pending AMX series (and,
> obviously, ahead of the not even submitted yet KeyLocker one), this
> series is intentionally built on top of "x86emul: a few small steps
> towards disintegration", which has already been pending for far too
> long.
>
> Jan
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