[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Xen Security Advisory 407 v1 (CVE-2022-23816,CVE-2022-23825,CVE-2022-29900) - Retbleed - arbitrary speculative code execution with return instructions
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 Xen Security Advisory CVE-2022-23816,CVE-2022-23825,CVE-2022-29900 / XSA-407 Retbleed - arbitrary speculative code execution with return instructions ISSUE DESCRIPTION ================= Researchers at ETH Zurich have discovered Retbleed, allowing for arbitrary speculative execution in a victim context. For more details, see: https://comsec.ethz.ch/retbleed ETH Zurich have allocated CVE-2022-29900 for AMD and CVE-2022-29901 for Intel. Despite the similar preconditions, these are very different microarchitectural behaviours between vendors. On AMD CPUs, Retbleed is one specific instance of a more general microarchitectural behaviour called Branch Type Confusion. AMD have assigned CVE-2022-23816 (Retbleed) and CVE-2022-23825 (Branch Type Confusion). For more details, see: https://www.amd.com/en/corporate/product-security/bulletin/amd-sb-1037 On Intel CPUs, Retbleed is not a new vulnerability; it is only applicable to software which did not follow Intel's original Spectre-v2 guidance. Intel are using the ETH Zurich allocated CVE-2022-29901. For more details, see: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00702.html https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/return-stack-buffer-underflow.html ARM have indicated existing guidance on Spectre-v2 is sufficient. IMPACT ====== An attacker might be able to infer the contents of arbitrary host memory, including memory assigned to other guests. VULNERABLE SYSTEMS ================== Systems running all versions of Xen are affected. Whether a CPU is potentially vulnerable depends on its microarchitecture. Consult your hardware vendor. For ARM and Intel CPUs, Xen implemented the vendor-recommended defaults in XSA-254 and follow-on fixes. Therefore, the Xen Security Team believes there are no further changes necessary on these CPUs. Administrators who deviated from the default mitigations are potentially affected and should re-evaluate their threat model. For AMD, CPUs from the Zen2 microarchitecture and earlier are potentially vulnerable. Zen3 and later CPUs are not believed to be vulnerable. The patches for Xen implement the IBPB-at-entry mitigation. This depends on the IBPB microcode distributed by AMD in 2018 as part of the original Spectre/Meltdown work. Consult your dom0 OS vendor. In addition to IBPB, "cross thread" safety is necessary. On Zen2 CPUs, Xen uses STIBP by default. On Zen1 CPUs, SMT needs disabling either in the firmware, or by passing `smt=0` on Xen's command line. On Fam15h CPUs, Cluster Multi-Threading needs disabling in firmware. Due to performance concerns, dom0 is excluded from IBPB-on-entry protections by default. This is because PV dom0 is trusted in most deployments. If your threat model model doesn't allow for dom0 to be treated specially, boot with `spec-ctrl=ibpb-entry` which will cause IBPB-on-entry protections to be applied to dom0 too. MITIGATION ========== There are no mitigations. RESOLUTION ========== Applying the appropriate attached patch resolves this issue. Note that patches for released versions are generally prepared to apply to the stable branches, and may not apply cleanly to the most recent release tarball. Downstreams are encouraged to update to the tip of the stable branch before applying these patches. For the 4.15 and 4.16 branches in particular, these patches depend on: - x86/spec-ctrl: Only adjust MSR_SPEC_CTRL for idle with legacy IBRS - x86/spec-ctrl: Knobs for STIBP and PSFD, and follow hardware STIBP hint - xen/cmdline: Extend parse_boolean() to signal a name match - x86/spec-ctrl: Add fine-grained cmdline suboptions for primitives which have been recently backported. xsa407/xsa407-?.patch xen-unstable xsa407/xsa407-4.16-*.patch Xen 4.16.x xsa407/xsa407-4.15-*.patch Xen 4.15.x xsa407/xsa407-4.14-*.patch Xen 4.14.x xsa407/xsa407-4.13-*.patch Xen 4.13.x $ sha256sum xsa407* xsa407*/* 0a6dea915dd760afc73c3f50f432422d2e853eecaf99e3cdeb2d6e0fb3ee71b1 xsa407.meta 8894b0dc8e8c0900560366bde766826bf357c8aec3233ed6147f2094633a3cbc xsa407/xsa407-1.patch 5955614d73b34ebeab45386dbc9dbe5d96c54f7945d22d5de6c645a5b7796a2f xsa407/xsa407-2.patch 1f901df3a382a547dda6ef4ef088a5cf60a2d2b0382be451b148bf166cf43013 xsa407/xsa407-3.patch 8f75a9eee8ee2a563bc90e493ba1e4ac29335f677a3d2049ec27e138b7e3021e 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xsa407/xsa407-8.patch $ NOTE CONCERNING LACK OF EMBARGO =============================== The disclosers did not authorise us to predisclose. -----BEGIN PGP SIGNATURE----- iQFABAEBCAAqFiEEI+MiLBRfRHX6gGCng/4UyVfoK9kFAmLNotoMHHBncEB4ZW4u b3JnAAoJEIP+FMlX6CvZeiUH/jZsXrd1X9mzVrBaoQQckCtYtrM+9rYS1JbupDZx Ca6P0zwKaX1uaDi/De/UCAbt4fCpE/xqqy9X5wMX0XUFJEhr74GKXDh/evzH7C/i WxwNmoTio0Un5jw+aLlKGza7oSNYVKPgYjDim7iTMmWdzWauS6Ock3HQn2jkG0JL nTarKFX2JjC2INiu6YssDS81nI6cPJAz+AB4FzzU6u/2loPZv5hxpYnrUsWlRaH1 87pAiGhi7gc9yhv9FTi3C/paBG/kioqQi/ahV5S/l2nlIR1xo97ewfStcdAsT5sl XgFq0sKLamMti0Ens3tydrXVNeyfHq9ABlN2eOnufZNT8Kc= =CEa6 -----END PGP SIGNATURE----- Attachment:
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