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[PATCH 1/3] x86/spec-ctrl: Consistently halt speculation using int3
- To: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Date: Mon, 18 Jul 2022 21:50:07 +0100
- Authentication-results: esa2.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none
- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Jan Beulich <JBeulich@xxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>
- Delivery-date: Mon, 18 Jul 2022 20:50:48 +0000
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- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
The RSB stuffing loop and retpoline thunks date from the very beginning, when
halting speculation was a brand new field.
These days, we've largely settled on int3 for halting speculation in
non-architectural paths. It's a single byte, and is fully serialising - a
requirement for delivering #BP if it were to execute.
Update the thunks. Mostly for consistency across the codebase, but it does
shrink every entrypath in Xen by 6 bytes which is a marginal win.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
CC: Wei Liu <wl@xxxxxxx>
---
xen/arch/x86/include/asm/spec_ctrl_asm.h | 11 +++--------
xen/arch/x86/indirect-thunk.S | 6 ++----
2 files changed, 5 insertions(+), 12 deletions(-)
diff --git a/xen/arch/x86/include/asm/spec_ctrl_asm.h
b/xen/arch/x86/include/asm/spec_ctrl_asm.h
index 9eb4ad9ab71d..fab27ff5532b 100644
--- a/xen/arch/x86/include/asm/spec_ctrl_asm.h
+++ b/xen/arch/x86/include/asm/spec_ctrl_asm.h
@@ -126,9 +126,8 @@
* change. Based on Google's performance numbers, the loop is unrolled to 16
* iterations and two calls per iteration.
*
- * The call filling the RSB needs a nonzero displacement. A nop would do, but
- * we use "1: pause; lfence; jmp 1b" to safely contains any ret-based
- * speculation, even if the loop is speculatively executed prematurely.
+ * The call filling the RSB needs a nonzero displacement, and int3 halts
+ * speculation.
*
* %rsp is preserved by using an extra GPR because a) we've got plenty spare,
* b) the two movs are shorter to encode than `add $32*8, %rsp`, and c) can be
@@ -141,11 +140,7 @@
.irp n, 1, 2 /* Unrolled twice. */
call .L\@_insert_rsb_entry_\n /* Create an RSB entry. */
-
-.L\@_capture_speculation_\n:
- pause
- lfence
- jmp .L\@_capture_speculation_\n /* Capture rogue speculation. */
+ int3 /* Halt rogue speculation. */
.L\@_insert_rsb_entry_\n:
.endr
diff --git a/xen/arch/x86/indirect-thunk.S b/xen/arch/x86/indirect-thunk.S
index 7cc22da0ef93..de6aef606832 100644
--- a/xen/arch/x86/indirect-thunk.S
+++ b/xen/arch/x86/indirect-thunk.S
@@ -12,11 +12,9 @@
#include <asm/asm_defns.h>
.macro IND_THUNK_RETPOLINE reg:req
- call 2f
+ call 1f
+ int3
1:
- lfence
- jmp 1b
-2:
mov %\reg, (%rsp)
ret
.endm
--
2.11.0
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