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Re: [PATCH 3/3] x86/spec-ctrl: Shrink further entry paths due to %rdx being 0


  • To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Tue, 19 Jul 2022 08:24:39 +0200
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  • Cc: Roger Pau Monné <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Tue, 19 Jul 2022 06:24:45 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 18.07.2022 22:50, Andrew Cooper wrote:
> --- a/xen/arch/x86/hvm/vmx/entry.S
> +++ b/xen/arch/x86/hvm/vmx/entry.S
> @@ -33,13 +33,12 @@ ENTRY(vmx_asm_vmexit_handler)
>          movb $1,VCPU_vmx_launched(%rbx)
>          mov  %rax,VCPU_hvm_guest_cr2(%rbx)
>  
> -        /* SPEC_CTRL_ENTRY_FROM_VMX    Req: b=curr %rsp=regs/cpuinfo, Clob: 
> acd */
> +        /* SPEC_CTRL_ENTRY_FROM_VMX    Req: %rsp=regs/cpuinfo, %rdx=0, Clob: 
> acd */
>          ALTERNATIVE "", DO_OVERWRITE_RSB, X86_FEATURE_SC_RSB_HVM

Leaving %rdx documented as clobbered here is misleading - the scope of
the comment is likely meant to extend to ...

>          .macro restore_spec_ctrl
>              mov    $MSR_SPEC_CTRL, %ecx
>              movzbl CPUINFO_xen_spec_ctrl(%rsp), %eax
> -            xor    %edx, %edx
>              wrmsr
>          .endm
>          ALTERNATIVE "", restore_spec_ctrl, X86_FEATURE_SC_MSR_HVM
> @@ -49,7 +48,6 @@ ENTRY(vmx_asm_vmexit_handler)
>          .macro restore_lbr
>              mov $IA32_DEBUGCTLMSR_LBR, %eax
>              mov $MSR_IA32_DEBUGCTLMSR, %ecx
> -            xor %edx, %edx
>              wrmsr
>          .endm
>          ALTERNATIVE "", restore_lbr, X86_FEATURE_XEN_LBR

... here, but that's not necessarily what a reader might gain. Plus
with the change the register isn't clobbered anymore.

> --- a/xen/arch/x86/include/asm/spec_ctrl_asm.h
> +++ b/xen/arch/x86/include/asm/spec_ctrl_asm.h
> @@ -176,7 +176,7 @@
>  .macro DO_SPEC_CTRL_ENTRY maybexen:req
>  /*
>   * Requires %rsp=regs (also cpuinfo if !maybexen)
> - * Requires %r14=stack_end (if maybexen)
> + * Requires %r14=stack_end (if maybexen), %rdx=0
>   * Clobbers %rax, %rcx, %rdx
>   *
>   * PV guests can't update MSR_SPEC_CTRL behind Xen's back, so no need to read
> @@ -184,7 +184,6 @@
>   * while entries from Xen must leave shadowing in its current state.
>   */
>      mov $MSR_SPEC_CTRL, %ecx
> -    xor %edx, %edx
>  
>      /*
>       * Clear SPEC_CTRL shadowing *before* loading Xen's value.  If entering

This is used in SPEC_CTRL_ENTRY_FROM_{INTR,PV} after
DO_SPEC_CTRL_COND_IBPB, which documents %rdx as clobbered. Since it
doesn't actually clobber the register, it's the documentation line
which needs updating along with making this code change.

With the respective adjustments
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>

Jan



 


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