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Re: Panic on CPU 0: FATAL TRAP: vec 7, #NM[0000]
- To: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Wed, 20 Jul 2022 14:59:35 +0200
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- Cc: Michael Young <m.a.young@xxxxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, ChrisD <chris@xxxxxxxxxxxx>
- Delivery-date: Wed, 20 Jul 2022 12:59:54 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 20.07.2022 12:02, Andrew Cooper wrote:
> One observation though. We do pass -mno-sse but not -mno-mmx. I still
> can't figure out what makes the compiler think there's any SIMD to be
> done in this function.
So this looks to be "optimization", done in a few more places. The pattern
is always the same: A 32-bit GPR is known to be zero, and there's nearby
code which wants to store two adjacent zeros. Hence they take those 32
bits of zero in the GPR, move to %mm0 (which already zeros the upper half),
unpack it to have the 32 bits of zero duplicated into the upper half, and
then use %mm0 to do the store of the pair of zeros. IOW they "auto-
vectorize" these two stores into a single V2SI (using the common notation)
one.
Besides this being quite the opposite of optimization, of course we didn't
tell the compiler anywhere that it might use any of the %mm<N> registers.
Jan
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