[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 03/11] x86emul: handle AVX512-FP16 Map5 arithmetic insns


  • To: Jan Beulich <jbeulich@xxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
  • Date: Wed, 10 Aug 2022 17:41:44 +0000
  • Accept-language: en-GB, en-US
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=tVQp/cl4Oj1QGx72NSGy52vyBEUR+YFbhytQDT4u7/Q=; b=PGHtm3xeHys5FgoB6M80iqWEP/XQzGXa8dO+M+8/IREU/Y6bv0vn9BE6j+m4+X30phgIv4j2fbUMDwPCPfeu9ypLW0VGmosOfLVRLDWtjexIWG3KrSuneptS+ZYYqWg/BrwzFvbXwwge8j8f0jFJmjl26NUa57ub8d2on8LPGHKni/gLb5czuhj5h9pKvVKPC2kMGMMZuZ7slv6VOY3Jom9wPy8UQp6oYKK/SW2Zq9934UA38z6sJ3rAbNBQm1ixIYLhl4nHII2ckQBkTbBCPfK2MiONw0mFtObfo1E1QWpSdvY0yf3AFis9n4kVrKgCPAhXwd9fjH3i37HYtfSbag==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=YHPD2SVlKT9Ns1LmEfY9ZM1CPg5aLvJgo5L7iAyDGm14+EoexA1/Ks52mEcBQ6Ea1fAhE4w1mOI2mTdOy3m5SSRlgtoZyMiXaXgGRIA+75VnxCkacewQzu46GIfx3UtEN3AzQ2JfckwKRMZ28dnXIrVMo0q/xN06M6/g+oPb4i6OBpEqtuys+tsKunJFAioAo9YG/PCeJvX7uXb4bC5ACpUUPUVPBKZvKigpynGdQAsrbhFzOwK3C8FHQ0OoSMuJ8hJ4VqeKDBcX4hjGjtLoYiGG8dgvcZVn0efnSI75cuByj9k56BPhGl9nRUahXRlXpe7YlxCSLc76YO2L8ZxSIA==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com;
  • Cc: Wei Liu <wl@xxxxxxx>, Roger Pau Monne <roger.pau@xxxxxxxxxx>
  • Delivery-date: Wed, 10 Aug 2022 17:42:10 +0000
  • Ironport-data: A9a23:AHA9g6CJdBqYIBVW/zDiw5YqxClBgxIJ4kV8jS/XYbTApD9xgTQDm zEXCjyOO/qKa2P1Lt1/aITjphsEsZbWzN5nQQY4rX1jcSlH+JHPbTi7wuYcHM8wwunrFh8PA xA2M4GYRCwMZiaA4E3ratANlFEkvYmQXL3wFeXYDS54QA5gWU8JhAlq3uU0meaEu/Dga++2k Y608pa31GONgWYuaDpEsvrb83uDgdyp0N8mlg1mDRx0lAe2e0k9VPo3Oay3Jn3kdYhYdsbSq zHrlezREsvxpn/BO/v9+lrJWhRiro36ZGBivkF+Sam66iWukwRpukoN2FjwXm8M49mBt4gZJ NygLvVcQy9xVkHHsLx1vxW1j0iSlECJkVPKCSHXjCCd86HJW3rp0/JIJmAQB8ojpvtpB3xR7 vcbAglYO3hvh8ruqF66Ys9Fo516aePNbMYYsHwmyizFB/E7R5yFW7/N+dJTwDY3gIZJAOraY M0aLzFoaXwsYTUWYgtRVM14wbfu3yevG9FbgAv9Sa4fym7f1gFulpPqN8LYYIeiTsRJhEeI4 GnB+gwVBzlFa4TDmGDUoxpAgMfJtyT+CJwqKYa5ycA3ph7Ny1wTDxcZAA7TTf6RzxTWt8hkA 04e9zcqrKMy3Fe2VdS7VBq9yFaUsxhZV9dOHukS7ACW1rGS8wufHnIDTDNKdJohrsBebSMu/ k+EmZXuHzMHjVGOYXeU97PRpzXiPyEQdDYGfXVdE1tD5MT/qoYuiB6JVsxkDKO+ktzyH3f33 iyOqy89wb4UiKbnypmGwLwOuBr0zrChc+L/zl+/sr6Nhu+hWLOYWg==
  • Ironport-hdrordr: A9a23:fS6BbKt5I9jcFbpQTXMPxFT47skC1YMji2hC6mlwRA09TyXGra 2TdaUgvyMc1gx7ZJh5o6H6BEGBKUmslqKceeEqTPqftXrdyRGVxeZZnMffKlzbamfDH4tmuZ uIHJIOb+EYYWIasS++2njBLz9C+qjJzEnLv5a5854Fd2gDBM9dBkVCe3+m+yZNNWt77O8CZf 6hD7181l+dkBosDviTNz0gZazuttfLnJXpbVotHBg88jSDijuu9frTDwWY9g12aUIP/Z4StU z+1yDp7KSqtP+2jjXG0XXI0phQkNz9jvNeGc23jNQPIDmEsHfpWG0hYczAgNkGmpDr1L8Yqq iJn/7mBbU115rlRBD2nfIq4Xin7N9h0Q669bbSuwqfnSWwfkNHNyMGv/MWTvKR0TtfgDk3up g7oF6xpt5ZCwjNkz/64MWNXxZ2llCsqX5niuILiWdDOLFuIYO5gLZvi3+9Kq1wah7S+cQiCq 1jHcvc7PFZfReTaG3YpHBmxJipUm4oFhmLT0AesojNugIm10xR3g8d3ogSj30A/JUyR91N4P nFKL1hkPVLQtUNZaxwCe8dSY+8C3DLQxjLLGWOSG6XXJ0vKjbIsdr68b817OaldNgBy4Yzgo 3IVBdCuWs7ayvVeLmzNV1wg2XwqUmGLETQI5tllulEU5XHNcnWGDzGTkwymM29pPhaCtHHWp +ISeBrP8M=
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Thread-index: AQHYgKKuUAaNhV3kckqqLTowVcQ2H62ov6QA
  • Thread-topic: [PATCH 03/11] x86emul: handle AVX512-FP16 Map5 arithmetic insns

On 15/06/2022 11:28, Jan Beulich wrote:
> This encoding space is a very sparse clone of the "twobyte" one. Re-use
> that table, as the entries corresponding to invalid opcodes in Map5 are
> simply benign with simd_size forced to other than simd_none (preventing
> undue memory reads in SrcMem handling early in x86_emulate()).

This...

> --- a/xen/arch/x86/x86_emulate/decode.c
> +++ b/xen/arch/x86/x86_emulate/decode.c
> @@ -1219,9 +1219,18 @@ int x86emul_decode(struct x86_emulate_st
>                          opcode |= MASK_INSR(0x0f3a, X86EMUL_OPC_EXT_MASK);
>                          d = twobyte_table[0x3a].desc;
>                          break;
> +
> +                    case evex_map5:
> +                        if ( !evex_encoded() )
> +                        {
>                      default:
> -                        rc = X86EMUL_UNRECOGNIZED;
> -                        goto done;
> +                            rc = X86EMUL_UNRECOGNIZED;
> +                            goto done;
> +                        }
> +                        opcode |= MASK_INSR(5, X86EMUL_OPC_EXT_MASK);
> +                        d = twobyte_table[b].desc;
> +                        s->simd_size = twobyte_table[b].size ?: simd_other;

... needs a comment here, and ...

> +                        break;
>                      }
>                  }
>                  else if ( s->ext < ext_8f08 + ARRAY_SIZE(xop_table) )
> @@ -1443,6 +1452,24 @@ int x86emul_decode(struct x86_emulate_st
>              }
>              break;
>  
> +        case ext_map5:
> +            switch ( b )
> +            {
> +            default:
> +                if ( !(s->evex.pfx & VEX_PREFIX_DOUBLE_MASK) )
> +                    s->fp16 = true;
> +                break;
> +
> +            case 0x2e: case 0x2f: /* v{,u}comish */
> +                if ( !s->evex.pfx )
> +                    s->fp16 = true;
> +                s->simd_size = simd_none;
> +                break;
> +            }
> +
> +            disp8scale = decode_disp8scale(twobyte_table[b].d8s, s);

... here.

Because otherwise the code reads as if it's buggy, with map5 referencing
the twobyte_table.

~Andrew

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.