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Re: [PATCH 11/11] x86emul: AVX512-FP16 testing
- To: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Thu, 11 Aug 2022 08:43:07 +0200
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- Cc: Wei Liu <wl@xxxxxxx>, Roger Pau Monne <roger.pau@xxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- Delivery-date: Thu, 11 Aug 2022 06:43:23 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 10.08.2022 21:14, Andrew Cooper wrote:
> On 15/06/2022 11:32, Jan Beulich wrote:
>> --- a/xen/include/public/arch-x86/cpufeatureset.h
>> +++ b/xen/include/public/arch-x86/cpufeatureset.h
>> @@ -281,7 +281,7 @@ XEN_CPUFEATURE(TSX_FORCE_ABORT, 9*32+13)
>> XEN_CPUFEATURE(SERIALIZE, 9*32+14) /*A SERIALIZE insn */
>> XEN_CPUFEATURE(TSXLDTRK, 9*32+16) /*a TSX load tracking
>> suspend/resume insns */
>> XEN_CPUFEATURE(CET_IBT, 9*32+20) /* CET - Indirect Branch Tracking
>> */
>> -XEN_CPUFEATURE(AVX512_FP16, 9*32+23) /* AVX512 FP16 instructions */
>> +XEN_CPUFEATURE(AVX512_FP16, 9*32+23) /*A AVX512 FP16 instructions */
>
> This ought to be 'a' rather than 'A' until someone's actually run the
> series on a SPR system.
Hmm, merely running the series there wouldn't mean much, as the code
doesn't usually come into play. My justification for going straight to
A was, as expressed in the description, that the new tests all pass on
SDE. Otherwise I think you're putting the bar too high for ever going
from a to A for such extensions where no new state is introduced, as
imo this would then mean proving that every single insn was actually
tested when taken through emulation.
> Otherwise, Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Thanks (also for the other ones), but I'll wait with applying this one
until we've settled on the above.
Jan
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