Need guidance regarding emulation of GICR_PENDBASER and GICR_PROPBASER registers on Aarch32

[Ayan Kumar Halder <ayankuma@xxxxxxx>]

Hi Andre/All,

Greetings. I am trying to port Xen on Cortex-R52.

I am trying to understand whether GICR_PENDBASER and GICR_PROPBASER 
exist on Aarch32 platform.
Looking at the definition of the registers in "Arm IHI ID020922", (from 
my understanding) it seems the registers can be accessed in 64bit mode only.
Please confirm if my understanding is correct or not.

This seems unlike GICR_TYPER which might be accessed as two 32 bit 
registers. The reason being the upper 32bits represent affinity and the 
lower 32 bits represent everything else.

If GICR_PENDBASER and GICR_PROPBASER are accessible in 64 bit mode only, 
then we Xen can't emulate them on Aarch32 as ISS is invalid (for ldrd, 
strd instructions).
However, looking at the following commit in kernel, I am a bit confused.

commit 0aa1de57319c4e023187aca0d59dd593a96459a8
Author: Andre Przywara <andre.przywara@xxxxxxx>
Date:   Fri Jul 15 12:43:29 2016 +0100

    KVM: arm64: vgic: Handle ITS related GICv3 redistributor registers

    In the GICv3 redistributor there are the PENDBASER and PROPBASER
    registers which we did not emulate so far, as they only make sense
    when having an ITS. In preparation for that emulate those MMIO
    accesses by storing the 64-bit data written into it into a variable
    which we later read in the ITS emulation.
    We also sanitise the registers, making sure RES0 regions are respected
    and checking for valid memory attributes.

<<<<< code >>>
REGISTER_DESC_WITH_LENGTH(GICR_PROPBASER,
-               vgic_mmio_read_raz, vgic_mmio_write_wi, 8,
+               vgic_mmio_read_propbase, vgic_mmio_write_propbase, 8,
                VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
        REGISTER_DESC_WITH_LENGTH(GICR_PENDBASER,
-               vgic_mmio_read_raz, vgic_mmio_write_wi, 8,
+               vgic_mmio_read_pendbase, vgic_mmio_write_pendbase, 8,
                VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
<<<< code >>>>

The register regions are defined in arch/arm64/kvm/vgic/vgic-mmio-v3.c 
and the registers seem accessible in both 64 bit and 32 bit modes.
Please let me know if GICR_PENDBASER and GICR_PROPBASER are accessible 
in 32 bit mode.
Kind regards,
Ayan