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[RFC PATCH v1 06/12] Arm: GICv3: Emulate of ICC_SGI1R on AArch32
- To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Ayan Kumar Halder <ayankuma@xxxxxxx>
- Date: Fri, 21 Oct 2022 16:31:22 +0100
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- Cc: <sstabellini@xxxxxxxxxx>, <stefanos@xxxxxxxxxx>, <julien@xxxxxxx>, <Volodymyr_Babchuk@xxxxxxxx>, <bertrand.marquis@xxxxxxx>, Ayan Kumar Halder <ayankuma@xxxxxxx>
- Delivery-date: Fri, 21 Oct 2022 15:32:20 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
Refer Arm IHI 0069H ID020922, 12.5.23, ICC_SGI1R is a 64 bit register on
Aarch32 systems. Thus, the prototype needs to change to reflect this.
Signed-off-by: Ayan Kumar Halder <ayankuma@xxxxxxx>
---
xen/arch/arm/vgic-v3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index 9f31360f56..48e8ef95d2 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1482,7 +1482,7 @@ write_reserved:
return 1;
}
-static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
+static bool vgic_v3_to_sgi(struct vcpu *v, uint64_t sgir)
{
int virq;
int irqmode;
--
2.17.1
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