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[PATCH for-4.17 v2 0/3] amd/virt_ssbd: refactoring and fixes
- To: xen-devel@xxxxxxxxxxxxxxxxxxxx
- From: Roger Pau Monne <roger.pau@xxxxxxxxxx>
- Date: Fri, 28 Oct 2022 13:49:10 +0200
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- Cc: Henry.Wang@xxxxxxx, Roger Pau Monne <roger.pau@xxxxxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, George Dunlap <george.dunlap@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>
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- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
Hello,
The following series aims to remove running C code with GIF=0 on the AMD
vm{entry,exit} paths. As a result, the context switching of SSBD is
done when context switching vCPUs, and hence Xen code is run with the
guest selection of SSBD.
First patch is a bugfix for missing VIRT_SPEC_CTRL MSR loading, while
second takes care of removing the loading of VIRT_SPEC_CTRL on
guest/hypervisor context switch. Last patch is a cleanup, that's
already reviewed.
I tested on Naples and Milan CPUs (and migrating from Naples to Milan
correctly carrying the VIRT_SSBD bit), but I haven't tested on a
platform that exposes VIRT_SSBD itself. I think the path is
sufficiently similar to the legacy one.
Currently running a gitlab CI loop in order to check everything is OK.
Roger Pau Monne (3):
hvm/msr: load VIRT_SPEC_CTRL
amd/virt_ssbd: set SSBD at vCPU context switch
amd: remove VIRT_SC_MSR_HVM synthetic feature
docs/misc/xen-command-line.pandoc | 10 +++--
xen/arch/x86/cpu/amd.c | 56 ++++++++++++++------------
xen/arch/x86/cpuid.c | 9 +++--
xen/arch/x86/hvm/hvm.c | 1 +
xen/arch/x86/hvm/svm/entry.S | 6 ---
xen/arch/x86/hvm/svm/svm.c | 49 ++++++++++------------
xen/arch/x86/include/asm/amd.h | 3 +-
xen/arch/x86/include/asm/cpufeatures.h | 2 +-
xen/arch/x86/msr.c | 7 ++++
xen/arch/x86/spec_ctrl.c | 8 ++--
10 files changed, 78 insertions(+), 73 deletions(-)
--
2.37.3
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