[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[XEN v3 06/12] xen/Arm: vGICv3: Fix emulation of ICC_SGI1R on AArch32


  • To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>
  • Date: Fri, 11 Nov 2022 14:17:33 +0000
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=FxJEzx55FB4HZS9AGsQGP4TBIHzxSrHrhRRSTavBMYM=; b=B5Tldffa7e7Tbyk21fXSakNWNLFQaRvmalgEcpW9prlEEsJ/3fRNnS7J2d4sCbnN9BrOUuOHGvmHQk+VkJLo9UUM5IByZsDbTXkqWy0LtA7H5i5HY3AR5sZe+DFniu+CNARYVU4AWsOqaq1Qd5UIxqSyi1OL23mdcDAyo/Peznv2e3DpkzxcNANPDrKyX08EQLJiynX/4wxCZwiqTm7re7K8pHpaxNtbKa4tr6DUoIstRZH6nRmPub/CTFbataEstEi9z7RbP/ruDmLbYyRfJKU8iQl1Z+M9OE0/aD7HVn23UAL5dJlQ0OmPGgLt4P20uYGG0WPsWySHSW2Log5jEg==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=A2JqJJ4fseB34F0NMFpJOLSEmVIRk0hngztiVW78/S6q7qo5Tygeljd3RYWGp47JCpizBDr2EL2K6R0JhyqezaP4CymejtYdnnwaB/EL0g6O98TWCHZGS4zqAg8uJmChuUNF69FzIWGZ35iGEu0b63z04eEe8b6iPQmrHO2KBHFdyYWdkDYovKz/UEB3W8vOFW1M6GruUgvoX1+TMe1P/tSaD1TnS66NIMV3abJ+rJV19yakS4EvEXhnfa+K4/RocRJA8nryI7bkqgXmlmV5irO8Pzp4U7lzgYd5DN/vlILiOs4PDnoB9zmjHDKwe8+/IgRDGPPuR3hRukp/SsYlJg==
  • Cc: <sstabellini@xxxxxxxxxx>, <stefanos@xxxxxxxxxx>, <julien@xxxxxxx>, <Volodymyr_Babchuk@xxxxxxxx>, <bertrand.marquis@xxxxxxx>, <michal.orzel@xxxxxxx>, <jgrall@xxxxxxxxxx>, <burzalodowa@xxxxxxxxx>, "Ayan Kumar Halder" <ayan.kumar.halder@xxxxxxx>
  • Delivery-date: Fri, 11 Nov 2022 14:18:24 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

Refer Arm IHI 0069H ID020922, 12.5.23, ICC_SGI1R is a 64 bit register on
AArch32 systems. Thus, the function needs to change to reflect this.
The reason being 'register_t' is defined as 'u32' on AArch32.

Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>
Reviewed-by: Michal Orzel <michal.orzel@xxxxxxx>
Acked-by: Julien Grall <jgrall@xxxxxxxxxx>
---

Changes from :-
v1 - 1. Updated the commit message.

v2 - 1. No changes.

 xen/arch/arm/vgic-v3.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index a7a935ff57..93c8a0ae79 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1479,7 +1479,7 @@ write_reserved:
     return 1;
 }
 
-static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
+static bool vgic_v3_to_sgi(struct vcpu *v, uint64_t sgir)
 {
     int virq;
     int irqmode;
-- 
2.17.1




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.