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Re: Arm: AArch32: Need suggestions to support 32 bit physical addresses


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Ayan Kumar Halder <ayankuma@xxxxxxx>
  • Date: Wed, 30 Nov 2022 12:43:09 +0000
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  • Delivery-date: Wed, 30 Nov 2022 12:43:39 +0000
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On 30/11/2022 12:01, Jan Beulich wrote:
On 30.11.2022 12:27, Ayan Kumar Halder wrote:
Looking at "min(flsl(mfn + 1) - 1 + PAGE_SHIFT, PADDR_BITS);", I do not
understand the reason for "... -1" (ie subtracting by 1).

Do you know the reason ?
That's because fls() and flsl() and friends return 1-based bit indexes
(with 0 being returned when the input was zero), when we need 0-based
values here.

IIUC, you are comparing the count of bits here (not bit indexes).

PADDR_BITS = 52 (x86), 48 (arm64) and 40 (armv7 arm32).

Also fls() returning 0 is correct as none of the bits are set.

In this case "flsl(mfn + 1)" will return 1 when mfn == 0(min value), so I think you are subtracting by 1.


Should I send a patch to fix the below ?

diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index 62afb07bc6..cd390a0956 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -2245,7 +2245,7 @@ void __init xenheap_max_mfn(unsigned long mfn)
 {
     ASSERT(!first_node_initialised);
     ASSERT(!xenheap_bits);
-    BUILD_BUG_ON(PADDR_BITS >= BITS_PER_LONG);
+    BUILD_BUG_ON(PADDR_BITS > BITS_PER_LONG);
     xenheap_bits = min(flsl(mfn + 1) - 1 + PAGE_SHIFT, PADDR_BITS);
     printk(XENLOG_INFO "Xen heap: %u bits\n", xenheap_bits);
 }

- Ayan


Jan



 


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