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Re: [PATCH] x86/SVM: restrict hardware SSBD update upon guest VIRT_SPEC_CTRL write


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Date: Mon, 12 Dec 2022 12:06:16 +0100
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On Fri, Dec 09, 2022 at 11:11:29AM +0100, Jan Beulich wrote:
> On 09.12.2022 10:59, Roger Pau Monné wrote:
> > On Thu, Dec 08, 2022 at 12:24:54PM +0100, Jan Beulich wrote:
> >> --- a/xen/arch/x86/msr.c
> >> +++ b/xen/arch/x86/msr.c
> >> @@ -699,12 +699,16 @@ int guest_wrmsr(struct vcpu *v, uint32_t
> >>          }
> >>          else
> > 
> > I think you could turn this into an `else if` and check if the new
> > value and the current one differ on the SSBD bit?
> 
> I'd prefer not to: Keeping it as I have it will likely reduce code churn
> if a 2nd bit wants supporting in that MSR.
> 
> > Provided it fixes the issue:
> > 
> > Acked-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
> 
> Thanks, but I'm a little puzzled by the constraint: Imo even if this
> doesn't address the observed issue, it still fixes one aspect of wrong
> behavior here. The sole difference then would be that the Reported-by:
> would go away.

Just wanted to make sure whether there was a further issue linked with
this, in a way that we might need to change the fix.  Maybe do the
accounting in amd_set_legacy_ssbd() and keep track of each thread
status.

Thanks, Roger.



 


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