Re: [PATCH v1 10/14] xen/riscv: mask all interrupts

[Alistair Francis <alistair23@xxxxxxxxx>]

On Sat, Jan 21, 2023 at 1:00 AM Oleksii Kurochko
<oleksii.kurochko@xxxxxxxxx> wrote:
>
> Signed-off-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>

Reviewed-by: Alistair Francis <alistair.francis@xxxxxxx>

Alistair

> ---
>  xen/arch/riscv/riscv64/head.S | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/xen/arch/riscv/riscv64/head.S b/xen/arch/riscv/riscv64/head.S
> index d444dd8aad..ffd95f9f89 100644
> --- a/xen/arch/riscv/riscv64/head.S
> +++ b/xen/arch/riscv/riscv64/head.S
> @@ -1,6 +1,11 @@
> +#include <asm/riscv_encoding.h>
> +
>          .section .text.header, "ax", %progbits
>
>  ENTRY(start)
> +        /* Mask all interrupts */
> +        csrw    CSR_SIE, zero
> +
>          la      sp, cpu0_boot_stack
>          li      t0, STACK_SIZE
>          add     sp, sp, t0
> --
> 2.39.0
>
>