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[PATCH v2 1/2] xen/riscv: add EMBEDDED_EXTRA_CFLAGS to CFLAGS



The patch is needed to keep all address of cpu0_boot_stack
PC-relative.

Pseudoinstruction 'la' can be transformed to 'auipc/addi' or
'auipc/l{w|d}'. It depends on the .option directive: nopic and pic
or compiler flags.

Right now, 'la' transforms to 'auipc/l{w|d}', which in case of
cpu0_boot_stack[] will lead to the usage of _GLOBAL_OFFSET_TABLE_
where all addresses will be without counting that it might happen
that linker address != load address ( so addresses inside got
sections will be relative to linker time ).

It happens becuase the compiler from riscv64 docker compiled with
--enable-default-pie:
  [user@49295ae49cbe build]$ riscv64-linux-gnu-gcc -v
  Using built-in specs.
  COLLECT_GCC=riscv64-linux-gnu-gcc
  COLLECT_LTO_WRAPPER=/usr/lib/gcc/riscv64-linux-gnu/12.2.0/lto-wrapper
  Target: riscv64-linux-gnu
  Configured with: /build/riscv64-linux-gnu-gcc/src/gcc-12.2.0/configure
  --prefix=/usr --program-prefix=riscv64-linux-gnu- --with-local-
  prefix=/usr/riscv64-linux-gnu --with-sysroot=/usr/riscv64-linux-gnu --
  with-build-sysroot=/usr/riscv64-linux-gnu --libdir=/usr/lib --
  libexecdir=/usr/lib --target=riscv64-linux-gnu --host=x86_64-pc-linux-
  gnu --build=x86_64-pc-linux-gnu --with-system-zlib --with-isl --with-
  linker-hash-style=gnu --disable-nls --disable-libunwind-exceptions --
  disable-libstdcxx-pch --disable-libssp --disable-multilib --disable-
  werror --enable-languages=c,c++ --enable-shared --enable-threads=posix
  --enable-__cxa_atexit --enable-clocale=gnu --enable-gnu-unique-object -
  -enable-linker-build-id --enable-lto --enable-plugin --enable-install-
  libiberty --enable-gnu-indirect-function --enable-default-pie --enable-
  checking=release
  Thread model: posix
  Supported LTO compression algorithms: zlib zstd
  gcc version 12.2.0 (GCC)

Looking at gcc spec file for the RISC-V architecture:
  [user@49295ae49cbe build]$ riscv64-linux-gnu-gcc -dumpspecs | grep -i
  pic
  --traditional-format %(subtarget_asm_debugging_spec) %{fno-pie|fno-
  PIE|fno-pic|fno-PIC:;:-fpic} %{march=*} %{mabi=*} %{mno-relax} %{mbig-
  endian} %{mlittle-endian} %(subtarget_asm_spec)%{misa-spec=*}
which means that -fpic is enabled if none of the following options are
present on the command line:
    -fno-pie
    -fno-PIE
    -fno-pic
    -fno-PIC

That's the reasons why 'la' is transformed to 'aupic/l{w|d} GOT' and
not be dependent on the toolchain used.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
---
 Changes in V2:
 * instead of changing 'la' to 'lla' to keep cpu0_boot_stack PC-relative
   it was updated CFLAGS with EMBEDDED_EXTRA_CFLAGS which contains
   -fno-PIE thereby 'la' will be transformed to 'auipc/addi' without
   GOT usage.
 * update the commit message with additional details.
---
 xen/arch/riscv/arch.mk | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/arch/riscv/arch.mk b/xen/arch/riscv/arch.mk
index 45fe858ee0..7448f759b4 100644
--- a/xen/arch/riscv/arch.mk
+++ b/xen/arch/riscv/arch.mk
@@ -1,6 +1,8 @@
 ########################################
 # RISCV-specific definitions
 
+$(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
+
 CFLAGS-$(CONFIG_RISCV_64) += -mabi=lp64
 
 riscv-march-$(CONFIG_RISCV_ISA_RV64G) := rv64g
-- 
2.39.2




 


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