[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [XEN v4 08/11] xen/arm: guest_walk: LPAE specific bits should be enclosed within "ifndef CONFIG_PHYS_ADDR_T_32"
As the previous patch introduces CONFIG_PHYS_ADDR_T_32 to support 32 bit physical addresses, the code specific to "Large Physical Address Extension" (ie LPAE) should be enclosed within "ifndef CONFIG_PHYS_ADDR_T_32". Refer xen/arch/arm/include/asm/short-desc.h, "short_desc_l1_supersec_t" unsigned int extbase1:4; /* Extended base address, PA[35:32] */ unsigned int extbase2:4; /* Extended base address, PA[39:36] */ Thus, extbase1 and extbase2 are not valid when 32 bit physical addresses are supported. Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx> Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> --- Changes from - v1 - 1. Extracted from "[XEN v1 8/9] xen/arm: Other adaptations required to support 32bit paddr". v2 - 1. Reordered this patch so that it appears after CONFIG_ARM_PA_32 is introduced (in 6/9). v3 - 1. Updated the commit message. 2. Added Ack. xen/arch/arm/guest_walk.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/arm/guest_walk.c b/xen/arch/arm/guest_walk.c index 43d3215304..c80a0ce55b 100644 --- a/xen/arch/arm/guest_walk.c +++ b/xen/arch/arm/guest_walk.c @@ -154,8 +154,10 @@ static bool guest_walk_sd(const struct vcpu *v, mask = (1ULL << L1DESC_SUPERSECTION_SHIFT) - 1; *ipa = gva & mask; *ipa |= (paddr_t)(pte.supersec.base) << L1DESC_SUPERSECTION_SHIFT; +#ifndef CONFIG_PHYS_ADDR_T_32 *ipa |= (paddr_t)(pte.supersec.extbase1) << L1DESC_SUPERSECTION_EXT_BASE1_SHIFT; *ipa |= (paddr_t)(pte.supersec.extbase2) << L1DESC_SUPERSECTION_EXT_BASE2_SHIFT; +#endif /* CONFIG_PHYS_ADDR_T_32 */ } /* Set permissions so that the caller can check the flags by herself. */ -- 2.17.1
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