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Re: [PATCH v4] x86: detect CMOS aliasing on ports other than 0x70/0x71
- To: Roger Pau Monné <roger.pau@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Wed, 22 Mar 2023 10:55:42 +0100
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- Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Paul Durrant <paul@xxxxxxx>, Wei Liu <wl@xxxxxxx>
- Delivery-date: Wed, 22 Mar 2023 09:56:00 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 21.03.2023 15:12, Roger Pau Monné wrote:
> On Mon, Mar 20, 2023 at 09:32:26AM +0100, Jan Beulich wrote:
>> ... in order to also intercept Dom0 accesses through the alias ports.
>
> I'm trying to get some documentation about this aliasing, but so far I
> haven't been able to find any. Do you have any references of where I
> might be able to find it?
I think several ICH datasheet documents mention this. Right now I'm
looking at the ICH10 one (319973-003), section 13.6.1 ("I/O Register
Address Map" under "Real Time Clock Registers").
But such aliasing (really: lack of decoding) has been present on
various of the low 1024 ports from the very early days of x86. So we
may want to take care of such elsewhere as well, e.g. for the PIC
(where aforementioned doc also explicitly mentions the aliases).
>> Also stop intercepting accesses to the CMOS ports if we won't ourselves
>> use the CMOS RTC.
>
> Could this create any concerns with the ability to disable NMIs if we
> no longer filter accesses to the RTC?
Hmm, that's a valid concern, but I'm not sure in how far we need to
be worried about giving Dom0 this level of control. As long as we
don't use it ourselves of course (I'm unaware of us using this
anywhere). If we're worried, we could continue to intercept port
0x70 alone, just to mask off the top bit for writes.
Jan
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