[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH 3/3] x86: Use CpuidUserDis if an AMD HVM guest toggles CPUID faulting
This is in order to aid guests of AMD hardware that we have exposed CPUID faulting to. If they try to modify the Intel MSR that enables the feature, trigger levelling so AMD's version of it (CpuidUserDis) is used instead. Signed-off-by: Alejandro Vallejo <alejandro.vallejo@xxxxxxxxx> --- xen/arch/x86/msr.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index ecf126566d..984aedf180 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -431,6 +431,13 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) { bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting; + /* + * The boot CPU must support Intel's CPUID faulting _or_ + * AMD's CpuidUserDis. + */ + bool can_fault_cpuid = cpu_has_cpuid_faulting || + boot_cpu_has(X86_FEATURE_CPUID_USER_DIS); + rsvd = ~0ull; if ( cp->platform_info.cpuid_faulting ) rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING; @@ -440,7 +447,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) msrs->misc_features_enables.raw = val; - if ( v == curr && is_hvm_domain(d) && cpu_has_cpuid_faulting && + if ( v == curr && is_hvm_domain(d) && can_fault_cpuid && (old_cpuid_faulting ^ msrs->misc_features_enables.cpuid_faulting) ) ctxt_switch_levelling(v); break; -- 2.34.1
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