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Re: [PATCH 2/2] xen/arm: smmuv3: Advertise coherent table walk if supported
- To: Michal Orzel <michal.orzel@xxxxxxx>
- From: Rahul Singh <Rahul.Singh@xxxxxxx>
- Date: Mon, 15 May 2023 08:32:41 +0000
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- Thread-topic: [PATCH 2/2] xen/arm: smmuv3: Advertise coherent table walk if supported
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Hi Michal,
On 12 May 2023, at 3:35 pm, Michal Orzel <michal.orzel@xxxxxxx> wrote:
At the moment, even in case of a SMMU being I/O coherent, we clean the
updated PT as a result of not advertising the coherency feature. SMMUv3
coherency feature means that page table walks, accesses to memory
structures and queues are I/O coherent (refer ARM IHI 0070 E.A, 3.15).
Follow the same steps that were done for SMMU v1,v2 driver by the commit:
080dcb781e1bc3bb22f55a9dfdecb830ccbabe88
The same restrictions apply, meaning that in order to advertise coherent
table walk platform feature, all the SMMU devices need to report coherency
feature. This is because the page tables (we are sharing them with CPU)
are populated before any device assignment and in case of a device being
behind non-coherent SMMU, we would have to scan the tables and clean
the cache.
It is to be noted that the SBSA/BSA (refer ARM DEN0094C 1.0C, section D)
requires that all SMMUv3 devices support I/O coherency.
Signed-off-by: Michal Orzel <michal.orzel@xxxxxxx>
Reviewed-by: Rahul Singh < rahul.singh@xxxxxxx>
Regards,
Rahul
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