[PATCH v3 0/2] Add CpuidUserDis support

[Alejandro Vallejo <alejandro.vallejo@xxxxxxxxx>]

v3:
 * Move LCAP setters from patch 2 to patch 1
 * Comment on rationale for checking CPUID faulting before CpuidUserDis on AMD

Nowadays AMD supports trapping the CPUID instruction from ring>0 to ring0,
(CpuidUserDis) akin to Intel's "CPUID faulting". There is a difference in
that the toggle bit is in a different MSR and the support bit is in CPUID
itself rather than yet another MSR. This patch enables AMD hosts to use it
when supported in order to provide correct CPUID contents to PV guests.

Patch 1 moves vendor-specific code on probe_cpuid_faulting() to amd.c/intel.c

Patch 2 adds support for CpuidUserDis, hooking it in the probing path and
the context switching path.

Alejandro Vallejo (2):
  x86: Refactor conditional guard in probe_cpuid_faulting()
  x86: Add support for CpuidUserDis

 xen/arch/x86/cpu/amd.c         | 32 ++++++++++++++++++++-
 xen/arch/x86/cpu/common.c      | 51 ++++++++++++++++++----------------
 xen/arch/x86/cpu/intel.c       | 12 +++++++-
 xen/arch/x86/include/asm/amd.h |  1 +
 4 files changed, 70 insertions(+), 26 deletions(-)

-- 
2.34.1