[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH] x86/vPIC: register only one ELCR handler instance


  • To: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Fri, 26 May 2023 09:35:04 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=fbZyhmXvoa+G2jYdUn7X/SI6Ky0Cna4gbsBdriJhCF8=; b=oZP1yYIV67P2mlwiZVa50HsckZ19dQ1Gy/gWcvs+QhEN28tTLDN8rCmowVHapRbl+lJmwy/W7A7S9kAMlqwLwZcaw87iIIORdga65iIb78MOZj0f8oknb+na52UE0xpxydqblqYq/xJVRhWRonw5r3AHI+8Ww1IsheVnX6HD8Nwik25NDfH/iuww4XI1IivUwLZUzwrzbxCaDOo2rsgyM1b/c9IMApPf/SPS1zAq4gQeJtLkTErkURs0hl5TZhg13lhpycioVO2EG3X+Lmc5BXyyZSaPopcv2qWk49pim6fT95lCxl8ZBZNtLcn4MWPik80WgDtH1QsQm+Zo009PSA==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=oZ9SCV5eCmdmeyxTonD/7wRfKAAHavs9Q7Go2o0d3E+PlfEx0a67ez8Kiop+m3v8BadvfHPi3apEZKHns70BybA9KX9boYmF+QTFlv35xDT2WyVdAjifDTnoqs7LYhx2RJleF5Syi5amQ3R08J7DzrUehD6brRhfdlIG2hAWvDdPbTtYCX2zlaTkwyfGQ582KauLj0UPngUdd4ZEut1nbjM1KJJu6riLxuhZ35vxajEh/klS5H2upzPDqjE1qlnquYFsdNoV3LGLlAzAGo1ZbWslxcyWbRos0qi08BbilWyfBZzqAz/jhPfPIt/8EXF5uLRGsav5r6FusUKtX+SYXw==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com;
  • Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Delivery-date: Fri, 26 May 2023 07:35:15 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

There's no point consuming two port-I/O slots. Even less so considering
that some real hardware permits both ports to be accessed in one go,
emulating of which requires there to be only a single instance.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

--- a/xen/arch/x86/hvm/vpic.c
+++ b/xen/arch/x86/hvm/vpic.c
@@ -377,25 +377,34 @@ static int cf_check vpic_intercept_elcr_
     int dir, unsigned int port, unsigned int bytes, uint32_t *val)
 {
     struct hvm_hw_vpic *vpic;
-    uint32_t data;
+    unsigned int data, shift = 0;
 
-    BUG_ON(bytes != 1);
+    BUG_ON(bytes > 2 - (port & 1));
 
     vpic = &current->domain->arch.hvm.vpic[port & 1];
 
-    if ( dir == IOREQ_WRITE )
-    {
-        /* Some IRs are always edge trig. Slave IR is always level trig. */
-        data = *val & vpic_elcr_mask(vpic);
-        if ( vpic->is_master )
-            data |= 1 << 2;
-        vpic->elcr = data;
-    }
-    else
-    {
-        /* Reader should not see hardcoded level-triggered slave IR. */
-        *val = vpic->elcr & vpic_elcr_mask(vpic);
-    }
+    do {
+        if ( dir == IOREQ_WRITE )
+        {
+            /* Some IRs are always edge trig. Slave IR is always level trig. */
+            data = (*val >> shift) & vpic_elcr_mask(vpic);
+            if ( vpic->is_master )
+                data |= 1 << 2;
+            vpic->elcr = data;
+        }
+        else
+        {
+            /* Reader should not see hardcoded level-triggered slave IR. */
+            data = vpic->elcr & vpic_elcr_mask(vpic);
+            if ( !shift )
+                *val = data;
+            else
+                *val |= data << shift;
+        }
+
+        ++vpic;
+        shift += 8;
+    } while ( --bytes );
 
     return X86EMUL_OKAY;
 }
@@ -470,8 +479,7 @@ void vpic_init(struct domain *d)
     register_portio_handler(d, 0x20, 2, vpic_intercept_pic_io);
     register_portio_handler(d, 0xa0, 2, vpic_intercept_pic_io);
 
-    register_portio_handler(d, 0x4d0, 1, vpic_intercept_elcr_io);
-    register_portio_handler(d, 0x4d1, 1, vpic_intercept_elcr_io);
+    register_portio_handler(d, 0x4d0, 2, vpic_intercept_elcr_io);
 }
 
 void vpic_irq_positive_edge(struct domain *d, int irq)



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.