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[PATCH v3 0/4] x86: RSBA and RRSBA handling
- To: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Date: Mon, 12 Jun 2023 17:13:02 +0100
- Authentication-results: esa6.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none
- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Jan Beulich <JBeulich@xxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>
- Delivery-date: Mon, 12 Jun 2023 16:13:33 +0000
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- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
This series deals with the hanlding of the RSBA and RRSBA bits across all
parts and all mistakes encountered in various microcode versions.
There are only minor changes from v2. See patches for details.
Andrew Cooper (4):
x86/spec-ctrl: Use a taint for CET without MSR_SPEC_CTRL
x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations()
x86/spec-ctrl: Fix up the RSBA/RRSBA bits as appropriate
x86/cpu-policy: Derive RSBA/RRSBA for guest policies
xen/arch/x86/cpu-policy.c | 39 ++++++
xen/arch/x86/include/asm/cpufeature.h | 1 +
xen/arch/x86/spec_ctrl.c | 142 +++++++++++++++++---
xen/common/kernel.c | 2 +-
xen/include/public/arch-x86/cpufeatureset.h | 4 +-
xen/tools/gen-cpuid.py | 5 +-
6 files changed, 170 insertions(+), 23 deletions(-)
--
2.30.2
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