[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH 13/13] libxl: add support for parsing MSR features


  • To: xen-devel@xxxxxxxxxxxxxxxxxxxx
  • From: Roger Pau Monne <roger.pau@xxxxxxxxxx>
  • Date: Fri, 16 Jun 2023 15:10:19 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=3Mor47Tk+HAkXO06D3oYKwBm48TJAA+Ss+RoUvUbsSI=; b=kk8KKI5/kwVelY1+iDPYKOqSaRhrUhXyN2trk7svgCWuOH0oQsatxdfm08cKfYqyWs+hFJz8IPc+0XxBJk8Z/XCLFm+M/JMZOv4V7+Zw+WIXG0sw3zuxIScBHbZrCuqlFsLE8I8mXn+7QcOJPZUwTmLaCbCC3L2RydqUNjtoaJNojIklyyRIUW1S0EtJbT6jVjYdzM9wzeOC2jSZsNMIobALb4oLxaNENk5BNeWilur09JJnfXV0EFwzqPv1e/HvMpX6zbeZ5NpKDn6R0tiDWBXrzcy2JrC98MXuD2Dnqkk1xUwAXUOsD3ocdKN1Bc7/CanUT3RP/xK03PBMCL1LXA==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ezHsxC/PxitmDLy/AuvHFOeg6NRsGJ6zUok5QoNuN0g4dzNeKYkep8m9NXpoc8pPaWKkxhgD6zBp3s2CiR+7CC+JaDtkRMXh8PQUggycD3mO8wxLlaqvH9X9qLfa1tBV03zT1Kqs1nbFf57QiX7CeZxD2n+AgSSgHjlAZ/RP3PWsElCyHzV+zDvOaWVM1xOibPPEfpQjvdOyT91sz/WGuNLwsI528OZkz4EhZIipxo+HNKm9mkf3TgIkD2vUc7VQbwi/JpU2/S94dsQxkeEKJV2qx+b0fm5QHL8S58aXOFEdvkjD7W0JPBYatepYAGppSaQrw68ll6ovHnhAE3HR/A==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com;
  • Cc: Roger Pau Monne <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Juergen Gross <jgross@xxxxxxxx>
  • Delivery-date: Fri, 16 Jun 2023 13:20:20 +0000
  • Ironport-data: A9a23:1Vykq69hXgOhhk2GjRAXDrUDpX+TJUtcMsCJ2f8bNWPcYEJGY0x3m mcbCDjUOq3eYWD3Ld0lPozioB4H6JCHytJhHANvqHo8E34SpcT7XtnIdU2Y0wF+jCHgZBk+s 5hBMImowOQcFCK0SsKFa+C5xZVE/fjUAOG6UKicYXoZqTZMEE8JkQhkl/MynrlmiN24BxLlk d7pqojUNUTNNwRcawr40Ird7ks31BjOkGlA5AdmO6kV5AW2e0Q9V/rzG4ngdxMUfaEMdgKKb 76r5K20+Grf4yAsBruN+losWhRXKlJ6FVHmZkt+A8BOsDAbzsAB+v9T2M4nQVVWk120c+VZk 72hg3ASpTABZcUgkMxFO/VR/roX0aduoNcrKlDn2SCfItGvn9IBDJyCAWlvVbD09NqbDklJ9 aMeGi9OcSyjoP69m62hVuhzv8EaeZyD0IM34hmMzBn/JNN+G9X4ZfyP4tVVmjAtmspJAPDSI dIDbiZiZwjBZBsJPUoLDJU5n6GjgXyXnz9w8QrJ4/ZopTWMilAsuFTuGIO9ltiiX8Jak1zev mvb12/4HgsbJJqUzj/tHneE37aUxXOlANpCfFG+3ttmpgyY6TwzNCIHfkHmsPe1hEHhZ90Kf iT4/QJr98De7neDXtT7GhG1vnOAlhodQMZLVf037hmXzajZ6BrfAXILJhZebPQ2uclwQiYlv neLkMnuHidHq6CORDSW8bL8kN+pES0cLGtHfildSwIAu4PnuNtr0k+JSct/GqmoiNGzASv33 z2BsCk5gfMUkNIP0KK4u1vAhlpAu6T0c+L83S2PNkrN0++zTNfNi1CAgbQD0ct9EQ==
  • Ironport-hdrordr: A9a23:1fClgasnnZJ5u6rD9odxz2PA7skDRdV00zEX/kB9WHVpm6uj5q WTdZUgpH3JYVMqMk3I9ursBEHvK0msjaKdjbN8AV7aZniehILKFvAA0WKB+Vzd80yVzJ866U 4IScEXY+EYa2IUsS+Q2mmF+rgbruVurcuT9IDjJxgGd3APV51d
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

Introduce support for handling MSR features in
libxl_cpuid_parse_config().  The MSR policies are added to the
libxl_cpuid_policy like the CPUID one, which gets passed to
xc_cpuid_apply_policy().

This allows existing users of libxl to provide MSR related features as
key=value pairs to libxl_cpuid_parse_config() without requiring the
usage of a different API.

Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
---
 tools/libs/light/libxl_cpuid.c | 57 +++++++++++++++++++++++++++++++++-
 1 file changed, 56 insertions(+), 1 deletion(-)

diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c
index cbbd5d31d63b..804dddb446c3 100644
--- a/tools/libs/light/libxl_cpuid.c
+++ b/tools/libs/light/libxl_cpuid.c
@@ -149,6 +149,53 @@ static int cpuid_add(libxl_cpuid_policy *policy, const 
struct cpuid_flags *flag,
     return 0;
 }
 
+static struct xc_msr *msr_find_match(libxl_cpuid_policy *policy, uint32_t 
index)
+{
+    unsigned int i = 0;
+
+    if (policy->msr != NULL)
+        for (i = 0; policy->msr[i].index != XC_MSR_INPUT_UNUSED; i++)
+            if (policy->msr[i].index == index)
+                return &policy->msr[i];
+
+    policy->msr = realloc(policy->msr, sizeof(struct xc_msr) * (i + 2));
+    policy->msr[i].index = index;
+    memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) - 1);
+    policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] = '\0';
+    policy->msr[i + 1].index = XC_MSR_INPUT_UNUSED;
+
+    return &policy->msr[i];
+}
+
+static int msr_add(libxl_cpuid_policy *policy, uint32_t index, unsigned int 
bit,
+                   const char *val)
+{
+    struct xc_msr *entry = msr_find_match(policy, index);
+
+    /* Only allow options taking a character for MSRs, no values allowed. */
+    if (strlen(val) != 1)
+        return 3;
+
+    switch (val[0]) {
+    case '0':
+    case '1':
+    case 'x':
+    case 'k':
+        entry->policy[63 - bit] = val[0];
+        break;
+
+    case 's':
+        /* Translate s -> k as xc_msr doesn't support the deprecated 's'. */
+        entry->policy[63 - bit] = 'k';
+        break;
+
+    default:
+        return 3;
+    }
+
+    return 0;
+}
+
 struct feature_name {
     const char *name;
     unsigned int bit;
@@ -328,7 +375,15 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list 
*policy, const char* str)
     }
 
     case FEAT_MSR:
-        return 2;
+    {
+        unsigned int bit = feat->bit % 32;
+
+        if (feature_to_policy[feat->bit / 32].msr.reg == CPUID_REG_EDX)
+            bit += 32;
+
+        return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index,
+                       bit, val);
+    }
     }
 
     return 2;
-- 
2.40.0




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.