[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH 2/7] xen/arm32: head: Add mising isb in switch_to_runtime_mapping()
- To: Julien Grall <julien@xxxxxxx>
- From: Bertrand Marquis <Bertrand.Marquis@xxxxxxx>
- Date: Tue, 4 Jul 2023 14:52:03 +0000
- Accept-language: en-GB, en-US
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8Mw5zgDD5rJ+Dxf4QZVM1g1KXBfXUpQaXzRUtGGCiUk=; b=bZFFZoXxOrFzEAeqKnD+cZ4/plULC2yADeYXgkdR0c4BEC55WR1NZh77UwtFfO9DSOvtvmuUgIbU/GGZABX2NnZUUFdpPOm2rz7IQgLPkFivRaz++Cuml03iCifFgosXIIBe1kzn3tqnc+pcQTw2negEFshK8K82lRlAtipAtFlFRnOu0pDDZcK9Xcltd6pxz6FrJAHtmmdo4A5yVlOZzGZ0gVsuXItCSvMac9yrNkSfZHB40tIFA9EAVu8419EbEjWHprELYyyvRfOxA8q99TEUxrOxsrfI2yI978WPaLUbn6ScQVC6CkQHCP8ilgXnryyGygbPS/9SSuLbHkq9Qw==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=JSOe5x25NyjqX7tghhCkfatI1FdhS5X6vK3Pm+2Uet9zlaJHxXOx9V5OHu9KnTdMfPHunnb7HPtGcULbPbVri7CZOiXgz11jhQK9rxoPL0rCbUEYPZS+CZPRKDiNvZoIb6aXxCXSRnyh+RsyNQZ4Flh0+7ciBck5CZ6dXDyD2wA6Z4M2WhXh6RitQya1RVsMvwUFazL8mOtTpVCLIPB1zMPz1PFAK6cU8wLgIBBwTxYz+0Vi1IEnVyXJLwIs1mhx4E1eBP0puHaqMFTLuKjfQ7cbRA1Xywsk6s/GR7Qz/XawywTNndLCFVayPqi0sCZ4CsOvcGlUNluXNPbRgL2zdw==
- Authentication-results-original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com;
- Cc: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Luca Fancellu <Luca.Fancellu@xxxxxxx>, "michal.orzel@xxxxxxx" <michal.orzel@xxxxxxx>, Henry Wang <Henry.Wang@xxxxxxx>, Julien Grall <jgrall@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
- Delivery-date: Tue, 04 Jul 2023 14:52:30 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Nodisclaimer: true
- Original-authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com;
- Thread-index: AQHZos+1DMO9eCrkWkO1W1uZVBjVB6+pyIMA
- Thread-topic: [PATCH 2/7] xen/arm32: head: Add mising isb in switch_to_runtime_mapping()
Hi Julien,
> On 19 Jun 2023, at 19:01, Julien Grall <julien@xxxxxxx> wrote:
>
> From: Julien Grall <jgrall@xxxxxxxxxx>
>
> Per the Arm Arm (ARM DDI 0406C.d A3.8.3):
>
> "The DMB and DSB memory barriers affect reads and writes to the memory
> system generated by load/store instructions and data or unified cache
> maintenance operations being executed by the processor. Instruction
> fetches or accesses caused by a hardware translation table access are
> not explicit accesses."
>
> The function switch_to_runtime_mapping() is responsible to map the
> Xen at its runtime address if we were using the temporary area before
> jumping returning using a runtime address. So we need to ensure the
> 'dsb' has completed before continuing. Therefore add an 'isb'.
>
> Fixes: fbd9b5fb4c26 ("xen/arm32: head: Remove restriction where to load Xen")
> Signed-off-by: Julien Grall <jgrall@xxxxxxxxxx>
Reviewed-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>
Cheers
Bertrand
> ---
> xen/arch/arm/arm32/head.S | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
> index 6ca3329138e3..b942e7e54d08 100644
> --- a/xen/arch/arm/arm32/head.S
> +++ b/xen/arch/arm/arm32/head.S
> @@ -656,6 +656,11 @@ switch_to_runtime_mapping:
>
> /* Ensure any page table updates are visible before continuing */
> dsb nsh
> + /*
> + * The function will return on the runtime mapping. So we want
> + * to prevent instruction fetch before the dsb completes.
> + */
> + isb
>
> ready_to_switch:
> mov pc, lr
> --
> 2.40.1
>
|
