[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v2 4/4] x86: short-circuit certain cpu_has_* when x86-64-v{2,3} are in effect
Certain fallback code can be made subject to DCE this way. Note that CX16 has no compiler provided manifest constant, so CONFIG_* are used there instead. Note also that we don't have cpu_has_movbe nor cpu_has_lzcnt (aka cpu_has_abm). Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> --- Of course we could use IS_ENABLED(CONFIG_X86_64_V<n>) everywhere, but as CX16 shows this isn't necessarily better than the #if/#else approach based on compiler-provided manifest symbols. While not really intended to be used that way, it looks as if we could also use IS_ENABLED(__POPCNT__) and alike if we thought this would end up neater (because of avoiding the #ifdef). We could go further and also short-circuit SSE*, AVX and alike, which we don't use outside of the emulator. This then would of course call for also having a way to select x86-64-v4. --- v2: Also cover XSAVE. --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -76,15 +76,25 @@ static inline bool boot_cpu_has(unsigned #define cpu_has_eist boot_cpu_has(X86_FEATURE_EIST) #define cpu_has_ssse3 boot_cpu_has(X86_FEATURE_SSSE3) #define cpu_has_fma boot_cpu_has(X86_FEATURE_FMA) -#define cpu_has_cx16 boot_cpu_has(X86_FEATURE_CX16) +#define cpu_has_cx16 (IS_ENABLED(CONFIG_X86_64_V2) || \ + IS_ENABLED(CONFIG_X86_64_V3) || \ + boot_cpu_has(X86_FEATURE_CX16)) #define cpu_has_pdcm boot_cpu_has(X86_FEATURE_PDCM) #define cpu_has_pcid boot_cpu_has(X86_FEATURE_PCID) #define cpu_has_sse4_1 boot_cpu_has(X86_FEATURE_SSE4_1) #define cpu_has_sse4_2 boot_cpu_has(X86_FEATURE_SSE4_2) #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) +#ifdef __POPCNT__ +#define cpu_has_popcnt true +#else #define cpu_has_popcnt boot_cpu_has(X86_FEATURE_POPCNT) +#endif #define cpu_has_aesni boot_cpu_has(X86_FEATURE_AESNI) +#ifdef __XSAVE__ +#define cpu_has_xsave true +#else #define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) +#endif #define cpu_has_avx boot_cpu_has(X86_FEATURE_AVX) #define cpu_has_f16c boot_cpu_has(X86_FEATURE_F16C) #define cpu_has_rdrand boot_cpu_has(X86_FEATURE_RDRAND) @@ -114,11 +124,19 @@ static inline bool boot_cpu_has(unsigned #define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES) /* CPUID level 0x00000007:0.ebx */ +#ifdef __BMI__ +#define cpu_has_bmi1 true +#else #define cpu_has_bmi1 boot_cpu_has(X86_FEATURE_BMI1) +#endif #define cpu_has_hle boot_cpu_has(X86_FEATURE_HLE) #define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2) #define cpu_has_smep boot_cpu_has(X86_FEATURE_SMEP) +#ifdef __BMI2__ +#define cpu_has_bmi2 true +#else #define cpu_has_bmi2 boot_cpu_has(X86_FEATURE_BMI2) +#endif #define cpu_has_invpcid boot_cpu_has(X86_FEATURE_INVPCID) #define cpu_has_rtm boot_cpu_has(X86_FEATURE_RTM) #define cpu_has_pqe boot_cpu_has(X86_FEATURE_PQE)
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