[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH] x86/cpu-policy: Advertise MSR_ARCH_CAPS to guests by default
- To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Wed, 26 Jul 2023 08:58:20 +0200
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=vCZKq6tggTefDdsAdG5ZksUbgsc10sUhZIUnGfnlVak=; b=mBRlM5yZf1Hhen67R+QNdHLS5TWHqSzY5OG6BNoe2lOIJ1dz0we3ghRqJc/qj9Vtp04szRUJjrMOIFIODaUy9a6uQNa+rGLNl0zymoxVjuuFvuERYf7RcJoPMyLlALbTVJLTHNb4Y+iEn89cJ4ns6L/Uegt8781NqTiUraj0DYyFvWgGRkiql0p5mu972daBUPuh9I0+Hd4YOJccpe8jfd3rYUWf1QU6+q8K9UdCUKPraikYEJtNgMVZG8GuH8N4jX3dOVoerK+5l1WSuM1KDA+HuJD1NUWjjcUZfXUAtWmzfyPOLoelmfSnatLm02PR4XR12VDTKV0/GgbbNJb0Sw==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=nNtVIyNK9r5nxgZ7mqt1b9m2JpEYWL15dQ46rriWF9LMxecxyXD6G8R+KjkZn0v7Z2EUR1ivMj4ItMTAYmPi6/unnc4b3EIDU5bLmbVm0Dtoo92Tk5MTTvZ0SSkIDoEhwu5+EcBvcoL9ZP+Ce+qMj0ucZzOt/GG0lFVRZwlkZ6RIrIz0IYRAPN8yZsSCHJMXwXh6avD/rQ0cQQDjWY0/2/dDPMu65ln+IE5h27tpKIbmsbo7AgEShImMTJ70LS23vmHT8caEz1M9E0GW2UjOikp7LwASYg8yJcztvv1MPlXCXWdwrSTLlzqKFa8UCS/vPt2J2K+plbhKkbFsuR8uMA==
- Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com;
- Cc: Roger Pau Monné <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- Delivery-date: Wed, 26 Jul 2023 06:58:29 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 25.07.2023 23:36, Andrew Cooper wrote:
> With xl/libxl now able to control the policy bits for MSR_ARCH_CAPS, it is
> safe to advertise to guests by default. In turn, we don't need the special
> case to expose details to dom0.
>
> This advertises MSR_ARCH_CAPS to guests on *all* Intel hardware, even if the
> register content ends up being empty. This is necessary in order to safely
> level two hosts which cross the Broadwell/Skylake divide.
Could you expand on this, so one won't have to dig out details from
elsewhere?
> On Cascade Lake and later hardware, guests can now see RDCL_NO (not vulnerable
> to Meltdown) amongst others. This causes substantial performance
> improvements, as guests are no longer applying software mitigations in cases
> where they don't need to.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> ---
> CC: Jan Beulich <JBeulich@xxxxxxxx>
> CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
> CC: Wei Liu <wl@xxxxxxx>
>
> Not to go in before Roger's libxl changes...
I was about to comment on the "now able to", when I saw this.
Preferably with a little bit more detail added to the description
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
Jan
|
