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RE: [PATCH v9 05/36] x86/opcode: Add ERETU, ERETS instructions to x86-opcode-map
- To: Masami Hiramatsu <mhiramat@xxxxxxxxxx>
- From: "Li, Xin3" <xin3.li@xxxxxxxxx>
- Date: Mon, 31 Jul 2023 16:36:44 +0000
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- Delivery-date: Mon, 31 Jul 2023 16:37:08 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Thread-index: AQHZw3zoe8WDZngsCk2Vpcje4URgCq/Tn9qAgABzJoA=
- Thread-topic: [PATCH v9 05/36] x86/opcode: Add ERETU, ERETS instructions to x86-opcode-map
> > Add instruction opcodes used by FRED ERETU/ERETS to x86-opcode-map.
> >
> > Opcode numbers are per FRED spec v5.0.
> >
> > Signed-off-by: H. Peter Anvin (Intel) <hpa@xxxxxxxxx>
> > Tested-by: Shan Kang <shan.kang@xxxxxxxxx>
> > Signed-off-by: Xin Li <xin3.li@xxxxxxxxx>
>
> This looks good to me. (ERETS has the opcode F2 0F 01 CA, ERETU has the opcode
> F3 0F 01 CA)
>
> Reviewed-by: Masami Hiramatsu (Google) <mhiramat@xxxxxxxxxx>
>
> Thank you,
Thanks! Will add your RB.
Xin
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