[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH 5/5] x86/dbg: Cleanup of legacy dr6 constants
From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Replace the few remaining uses with X86_DR6_* constants. Signed-off-by: Jinoh Kang <jinoh.kang.kr@xxxxxxxxx> --- CC: Jan Beulich <JBeulich@xxxxxxxx> CC: Wei Liu <wl@xxxxxxx> CC: Roger Pau Monné <roger.pau@xxxxxxxxxx> --- xen/arch/x86/hvm/vmx/vmx.c | 2 +- xen/arch/x86/include/asm/debugreg.h | 17 ----------------- xen/arch/x86/pv/emul-priv-op.c | 2 +- xen/arch/x86/traps.c | 2 +- 4 files changed, 3 insertions(+), 20 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 1fd902ed74..43b57a444e 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -4306,7 +4306,7 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &pending_dbg); __vmwrite(GUEST_PENDING_DBG_EXCEPTIONS, - pending_dbg | DR_STEP); + pending_dbg | X86_DR6_BS); } } diff --git a/xen/arch/x86/include/asm/debugreg.h b/xen/arch/x86/include/asm/debugreg.h index fd32846397..1061fdaaae 100644 --- a/xen/arch/x86/include/asm/debugreg.h +++ b/xen/arch/x86/include/asm/debugreg.h @@ -1,15 +1,6 @@ #ifndef _X86_DEBUGREG_H #define _X86_DEBUGREG_H - -/* Indicate the register numbers for a number of the specific - debug registers. Registers 0-3 contain the addresses we wish to trap on */ - -#define DR_FIRSTADDR 0 -#define DR_LASTADDR 3 -#define DR_STATUS 6 -#define DR_CONTROL 7 - /* * DR6 status bits. * N.B. For backwards compatibility, X86_DR6_RTM has inverted polarity. @@ -31,14 +22,6 @@ #define X86_DR6_DEFAULT 0xffff0ff0 /* Default %dr6 value. */ -#define DR_TRAP0 (0x1) /* db0 */ -#define DR_TRAP1 (0x2) /* db1 */ -#define DR_TRAP2 (0x4) /* db2 */ -#define DR_TRAP3 (0x8) /* db3 */ -#define DR_STEP (0x4000) /* single-step */ -#define DR_SWITCH (0x8000) /* task switch */ -#define DR_NOT_RTM (0x10000) /* clear: #BP inside RTM region */ - /* Now define a bunch of things for manipulating the control register. The top two bytes of the control register consist of 4 fields of 4 bits - each field corresponds to one of the four debug registers, diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 72d0514e74..78a1f4aff7 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -1359,7 +1359,7 @@ int pv_emulate_privileged_op(struct cpu_user_regs *regs) { case X86EMUL_OKAY: if ( ctxt.ctxt.retire.singlestep ) - ctxt.bpmatch |= DR_STEP; + ctxt.bpmatch |= X86_DR6_BS; if ( ctxt.bpmatch && !(curr->arch.pv.trap_bounce.flags & TBF_EXCEPTION) ) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 640b60e0e5..829741ff78 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1955,7 +1955,7 @@ void do_debug(struct cpu_user_regs *regs) * If however we do, safety measures need to be enacted. Use a big * hammer and clear all debug settings. */ - if ( dr6 & (DR_TRAP3 | DR_TRAP2 | DR_TRAP1 | DR_TRAP0) ) + if ( dr6 & X86_DR6_BP_MASK ) { unsigned int bp, dr7 = read_debugreg(7); -- 2.41.0
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