[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Xen-devel] [PATCH] x86/HVM: adjust hvm_interrupt_blocked()


  • To: Jan Beulich <JBeulich@xxxxxxxx>
  • From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Date: Thu, 31 Aug 2023 12:57:40 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=jJ6pPdZ64dlIvdahzCXO0jXvLEbc7vLFlD6XfT5ebTk=; b=UBhj+AstSFxqtpRRGMtduq/cA+LqhLBlDmh/suw2NWGXQZX2rqLjP1tyROghP+PommQXHkUss7zGDa6PCWZwUN+FIJsXOo8COCKzLe/auLUca2dv2jlhilzv4nKSwwZ4SKDd1fEOjJv0v7DrZiw+QbJjE8hFV07cb7ovAPyipInsSRh4P27KqSknG7t24nNrtgZ3RD9ejSdFRhEWCLz2POHRrmPT3UimFKjgW7V7os0DnFMi4LoH2aauobQlebP0DTfffVJyusnE///WHU1Cy4A+jRLEOc/MxCdmhN6E47U7PCXrYiAhRkJLI52EMo8M55d9y0M+Idryh7NvXB+ZNQ==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=FcFLor7J7i2oWozOWlN7s9Udym6pQT8xjFbZa5VruM+/5Ktvc+GMUkOdRVTNZPGy8bB5fn28JMaERZ2Dsn/7cnFrAC/kvtjyCpzTGzpgODhJoLT/nAjtHuhYR5yn9vFpxXtfxeXUSLYJkHo5f3LRrpyx0+RPo+HHDjqdllS9/Yh/f5n3xCqdaJwJzo625naOD27TivnT1UmKW8dytdHPIS1QbfzNhmNP6kxxNtB8ilkanpCf/OwjsQG9+l49jswTbrzGTAB5uvkv8AzGLjWsjwG4PI29YRgvQS4WOpQ1RN8sBEJ5bpW8H/k5wENIdZgEWijUk6RJ6hVxmR1xyZNm5g==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com;
  • Cc: xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wei.liu2@xxxxxxxxxx>
  • Delivery-date: Thu, 31 Aug 2023 10:58:03 +0000
  • Ironport-data: A9a23:lTxpE6sV4tb8cMhoKYWOlSyQUOfnVEVfMUV32f8akzHdYApBsoF/q tZmKWnXP6qPYWT0eY11Otu+9koD7cCEndU1HANl/iwwQn9D+JbJXdiXEBz9bniYRiHhoOCLz O1FM4Wdc5pkJpP4jk3wWlQ0hSAkjclkfpKlVKiffHg3HVQ+IMsYoUoLs/YjhYJ1isSODQqIu Nfjy+XSI1bg0DNvWo4uw/vrRChH4rKq4lv0gnRkPaoQ5A+FziFMZH4iDfrZw0XQE9E88tGSH 44v/JnhlkvF8hEkDM+Sk7qTWiXmlZaLYGBiIlIPM0STqkAqSh4ai87XB9JFAatjsB2bnsgZ9 Tl4ncfYpTHFnEH7sL91vxFwS0mSNEDdkVPNCSDXXce7lyUqf5ZwqhnH4Y5f0YAwo45K7W9yG fMwDzJWPzGmjL2P+5WDStZ2h+olLJPFM9ZK0p1g5Wmx4fcOZ7nmG/+Pz/kBmTA6i4ZJAOrUY NcfZXx3dhPcbhZTO1ARTpUjgOOvgXq5eDpdwL6XjfNvvy6Pk0osif6xabI5efTTLSlRtlyfq W/cuXzwHzkRNcCFyCrD+XWp7gPKtXqhAdhMTOfmq5aGhnWzyDEeNgcZZ2C0sKbmoGrvV45FA UYtr39GQa8asRbDosPGdz+SrWOAvxUcc8FNCOB84waIooLE7gDcCmUaQzppbN09qNRwVTEsz kWOnd7iGXpoqrL9dJ6G3rKdrDf3My5MK2YHPXUAVVFdv4Clp5wvhBXSSNolCLSyktD+BTD3x XaNsTQ6gLIQy8UM0s1X4Gz6vt5lnbCRJiZd2+kddjvNAt9RDGJ9W7GV1A==
  • Ironport-hdrordr: A9a23:stopra39usbEzdYJk/As+gqjBGMkLtp133Aq2lEZdPWaSL3nqy nOpoVr6faaskdqZJhNo6H6BEDEewKlyXcX2/h2AV7BZniahILAFugLjOvfKn/balTDH4VmpN tdmsZFeaLN5JtB/KTHCcuDYrUdKRW8gcSVbBnlo0uFtjsBV0id1WlE4/ygeXGeuzMqOXPFLv WhDwN81l/QHkgqUg==
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On Thu, Aug 31, 2023 at 12:42:58PM +0200, Roger Pau Monné wrote:
> On Fri, Oct 12, 2018 at 09:58:46AM -0600, Jan Beulich wrote:
> > First of all, hvm_intsrc_mce was not considered here at all, yet nothing
> > blocks #MC (other than an already in-progress #MC, but dealing with this
> > is not the purpose of this patch).
> > 
> > Additionally STI-shadow only blocks maskable interrupts, but not NMI.
> 
> I've found the Table 25-3 on Intel SDM vol3 quite helpful:
> 
> "Execution of STI with RFLAGS.IF = 0 blocks maskable interrupts on the
> instruction boundary following its execution.1 Setting this bit
> indicates that this blocking is in effect."
> 
> And:
> 
> "Execution of a MOV to SS or a POP to SS blocks or suppresses certain
> debug exceptions as well as interrupts (maskable and nonmaskable) on
> the instruction boundary following its execution."
> 
> Might be worth adding to the commit message IMO.

So I've found a further footnote that contains:

"Nonmaskable interrupts and system-management interrupts may also be
inhibited on the instruction boundary following such an execution of
STI."

So we want to take the more restrictive implementation of STI-shadow,
and block #NMI there also.

Thanks, Roger.



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.