[PATCH v10 01/38] x86/cpufeatures: Add the cpu feature bit for WRMSRNS

[Xin Li <xin3.li@xxxxxxxxx>]

WRMSRNS is an instruction that behaves exactly like WRMSR, with
the only difference being that it is not a serializing instruction
by default. Under certain conditions, WRMSRNS may replace WRMSR to
improve performance.

Add the CPU feature bit for WRMSRNS.

Tested-by: Shan Kang <shan.kang@xxxxxxxxx>
Signed-off-by: Xin Li <xin3.li@xxxxxxxxx>
---
 arch/x86/include/asm/cpufeatures.h       | 1 +
 tools/arch/x86/include/asm/cpufeatures.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h 
b/arch/x86/include/asm/cpufeatures.h
index 58cb9495e40f..330876d34b68 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -322,6 +322,7 @@
 #define X86_FEATURE_FSRS               (12*32+11) /* "" Fast short REP STOSB */
 #define X86_FEATURE_FSRC               (12*32+12) /* "" Fast short REP 
{CMPSB,SCASB} */
 #define X86_FEATURE_LKGS               (12*32+18) /* "" Load "kernel" 
(userspace) GS */
+#define X86_FEATURE_WRMSRNS            (12*32+19) /* "" Non-Serializing Write 
to Model Specific Register instruction */
 #define X86_FEATURE_AMX_FP16           (12*32+21) /* "" AMX fp16 Support */
 #define X86_FEATURE_AVX_IFMA            (12*32+23) /* "" Support for 
VPMADD52[H,L]UQ */
 #define X86_FEATURE_LAM                        (12*32+26) /* Linear Address 
Masking */
diff --git a/tools/arch/x86/include/asm/cpufeatures.h 
b/tools/arch/x86/include/asm/cpufeatures.h
index 798e60b5454b..1b9d86ba5bc2 100644
--- a/tools/arch/x86/include/asm/cpufeatures.h
+++ b/tools/arch/x86/include/asm/cpufeatures.h
@@ -318,6 +318,7 @@
 #define X86_FEATURE_FSRS               (12*32+11) /* "" Fast short REP STOSB */
 #define X86_FEATURE_FSRC               (12*32+12) /* "" Fast short REP 
{CMPSB,SCASB} */
 #define X86_FEATURE_LKGS               (12*32+18) /* "" Load "kernel" 
(userspace) GS */
+#define X86_FEATURE_WRMSRNS            (12*32+19) /* "" Non-Serializing Write 
to Model Specific Register instruction */
 #define X86_FEATURE_AMX_FP16           (12*32+21) /* "" AMX fp16 Support */
 #define X86_FEATURE_AVX_IFMA            (12*32+23) /* "" Support for 
VPMADD52[H,L]UQ */
 #define X86_FEATURE_LAM                        (12*32+26) /* Linear Address 
Masking */
-- 
2.34.1