[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [XEN PATCH 01/10] arm/gic: address violations of MISRA C:2012 Rule 8.2
Add missing parameter names, no functional change. Signed-off-by: Federico Serafini <federico.serafini@xxxxxxxxxxx> --- xen/arch/arm/include/asm/gic.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h index f1ef347edc..03f209529b 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -246,7 +246,7 @@ void gic_set_irq_type(struct irq_desc *desc, unsigned int type); /* Program the GIC to route an interrupt */ extern void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority); -extern int gic_route_irq_to_guest(struct domain *, unsigned int virq, +extern int gic_route_irq_to_guest(struct domain *d, unsigned int virq, struct irq_desc *desc, unsigned int priority); @@ -330,11 +330,11 @@ struct gic_hw_operations { /* Initialize the GIC and the boot CPU */ int (*init)(void); /* Save GIC registers */ - void (*save_state)(struct vcpu *); + void (*save_state)(struct vcpu *v); /* Restore GIC registers */ - void (*restore_state)(const struct vcpu *); + void (*restore_state)(const struct vcpu *v); /* Dump GIC LR register information */ - void (*dump_state)(const struct vcpu *); + void (*dump_state)(const struct vcpu *v); /* hw_irq_controller to enable/disable/eoi host irq */ hw_irq_controller *gic_host_irq_type; @@ -369,9 +369,9 @@ struct gic_hw_operations { /* Clear LR register */ void (*clear_lr)(int lr); /* Read LR register and populate gic_lr structure */ - void (*read_lr)(int lr, struct gic_lr *); + void (*read_lr)(int lr, struct gic_lr *lr_reg); /* Write LR register from gic_lr structure */ - void (*write_lr)(int lr, const struct gic_lr *); + void (*write_lr)(int lr, const struct gic_lr *lr_reg); /* Read VMCR priority */ unsigned int (*read_vmcr_priority)(void); /* Read APRn register */ -- 2.34.1
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